Memory Devices

Having seen the signals that one would see on 8-bit processors, let us focus our attention on the Memory chips. As an example, we will take and 8K x 8 SRAM chips which can have the following pins which would be assigned the following signals.

• 13 Address lines
• DIO - Data Input Output
• Read/Write signals
• Vcc
• Ground
• Chip Select - Normally referred to as CS. Unless CS is activated, memory does not do any function. The output of the chip will be tristated if CS is not enabled. A chip can have one or more than one CS. This will help in the elimination of the address decoding circuitry for minimum system configuration. Sometimes instead of CS the memory chip will be provided with Chip Enable inputs (CE) which will have similar functions. These chip select/chip enable signals can be active high or active low. READ/WRITE operation of the chip can be done only if the chip is selected by activating the chip select/enable signals.  Some chips may also have output enable signal OE.

SECOND EXAMPLE OF AN SRAM

2147 (4k x 1) 18 pins

Signals are:

• 12 Address lines
• Data Input and Data Output are separate signals.
• Read/Write signals
• Vcc
• Ground
• Chip Select

Q. What is pseudo Static RAM?

It is a dynamic RAM with refresh circuitry built on the chip itself. To the external world it looks like an SRAM as no external refresh circuitry need to be built. Some used to refer such chips as pseudo static RAMs.

Figure: Pin configuration, logic symbol, pin name, truth table and Block diagram

Figure : Complete schematic showing the data, address and control busses for the 8085 microprocessor