FPGA based Design and Development of PCI Bus Interface, VME Bus Interface, IEEE-488 Bus interface and 8051 Microcontroller core

Agent	Work	Grant
BARC (Computer Division)	FPGA based Design and Development of S5933 PCI Patchmaker Core, Generic USB Bus Interface, IEEE-488 Bus interface and 8051 Microcontroller core	Rs.6,00,000

PCI Patchmaker Core

This project deals with the design and implementation of a PCI soft core that is compatible to S5933 PCI matchmaker controller ASIC from AMCC. The soft core complies to PCI specification (Revision 2.1) and adheres to the S5933 specification on the add-on interface in terms of both timing and functionality. The soft core may be operated in either PCI master or slave mode with burst capabilities in both modes. It integrates an internal ROM for PCI configuration during boot-up. The soft core is simulated, implemented and tested on hardware using XCV300 device from Xilinx.

Generic USB Bus Interface

Design and implementation of a Generic USB Interface complying with the USB 2.0 specifications. It also involves design of a USB based function that can use the same interface. The interface acts as the bridge between the USB port and the local function of the device and uses a microcontroller interface to send/receive data on the local device. The serial data and the clock are recovered from the NRZI encoded bit stream using a DPLL. Then bit stuffing/unstuffing, NRZI encoding and decoding, address verification, PID generation and verification, CRC generation and checking and handshake generation takes place prior to sending/receiving data from the local device.

IEEE- 488.1 Compatible TMS 9914 Prototype

The scope of automated test systems has been increasing rapidly in recent years. Putting measuring instruments of various makes into one system presents many technical problems. To solve this IEC went ahead and defined a standard which every measuring apparatus must follow, which came to be known as IEEE 488. Previously it was called HP-Interface Bus as Hewlett Packard had designed this interface to connect their internal instruments to the computer.Texas Instruments took up the task of designing an adaptor which interfaces the IEEE General Purpose Interface Bus (GPIB) and the off-board CPU. Interface with GPIB is done via IEEE 488 transceivers. The TMS 9914 relieves the processor of the task of maintaining the IEEE protocol.
Department of Computer Science,IIT Bombay was given the task of redesigning this adaptor, sponsored by BARC-Trombay. This project aims at developing a complete remake of the TMS 9914 with minimum cost.

8051 Microcontroller Core

The project deals with design and implementation of IP8051, an 8051 compatible microcontroller core coded in VHDL, which is suitable for FPGA based system design. The core is designed for timing and instruction compatibility with an Intel 8051 microcontroller. The core supports the 12/24/48 cycle 8051 operations and can also be modified for reduced cycle instruction execution. The core is easily reconfigurable for use with external and on-FPGA ROM and RAM cores. The FPGA based design allows the user to customize the core and integrate it with peripherals tailored to specific applications. The core has been simulated and implemented on a Spartan2 XC2S200 FPGA. The core has clocked at 68MHz and has a total gate count (Including 128 byte internal register bank and standard 8051 peripherals) of approximately 32,000.