C file location
===============

YourFPGALinkInstallDir/20140524/makestuff/apps/flcli/main.c

VHDL file locations
===================
The entity declaration for the swled module is available in the file

YourFPGALinkInstallDir/20140524/makestuff/hdlmake/apps/makestuff/swled/templates/harness.vhdl

The architecture for the swled module is available in the file
YourFPGALinkInstallDir/20140524/makestuff/hdlmake/apps/makestuff/swled/cksum/vhdl/cksum_rtl.vhdl

You may also want to inspect the top level VHDL module that is actually mapped down to your FPGA board in the file

YourFPGALinkInstallDir/20140524/makestuff/hdlmake/apps/makestuff/swled/templates/fx2all/vhdl/top level.vhdl

Note that this instantiates the swled module and also another module
called comm fpga fx2.  The module comm fpga fx2 is responsible for
implementing the actual interface between the Digiltent Atlys board
and the host computer using the on-board Cypress FX2LP USB interface
micro-controller.  While it is not necessary for you to peek into the
details of comm fpga fx2 for purposes of this lab, the VHDL source for
this at

YourFPGALinkInstallDir/20140524/makestuff/hdlmake/libs/makestuff/comm-fpga/fx2/vhdl/comm_fpga fx2.vhdl

Similarly, the constraints file (that defines which
signal is mapped to which switch, LED, pin etc. on the actual Atlys
board) for your design is available at

YourFPGALinkInstallDir/20140524/makestuff/hdlmake/apps/makestuff/swled/templates/fx2all/boards/atlys/board.ucf