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Talks & Seminars
Title: Integrated Hardware-Software Approaches to Software Security
Prof. Bhagi Narahari, Dept. of Computer Science, The George Washington University, Washington D. C.
Date & Time: January 5, 2011 11:30
Venue: Conference Room, 01st Floor, ā€˜Cā€™ Block, Kanwal Rekhi Building
Abstract:
Software protection is one of the most significant problems in security today. In this talk we explore how the entire language-compiler-architecture chain can be designed to achieve security objectives such as code tampering, unauthorized access, reliability and privacy. The specific focus of our research is the expanding role of hardware in creating more secure embedded systems and thereby the question of "how can hardware assist us in providing secure trusted computing platforms?" We propose an approach that considers the growing role of hardware in providing secure execution environments. Our broad approach combines novel techniques in the areas of compilers and architecture to provide general-purpose solutions to problems in software security. In this talk, we will focus on embedded systems in mission critical applications in which software execution takes place entirely in encrypted form. In this case, instructions and data are encrypted in memory and decrypted in the processor to minimize exposure to hardware sniffing. While it is commonly believed that encrypted execution effectively deters any kind of attack, in fact we will describe several types of attacks that are still possible when the attacker has physical access to the system. Embedded systems, with their ubiquitous nature, are particularly vulnerable to physical capture and tampering. This talk discusses a co-design approach to address these attacks ā€“ the CODESSEAL system (COmpiler DEvelopment Suite for SEcure AppLications). We combine novel techniques in the areas of compilers, architecture and security in order to provide a high level of both security and adaptability by utilizing a secure hardware coprocessor in the form of an on-chip Field-Programmable Gate Array (FPGA). Our techniques require no changes to the processor or memory, and are transparent to the programmer. In this talk we will present our CODESSEAL architecture and its performance. The talk will conclude with a brief overview of our other synergistic research that utilizes a hardware-software approach for other information assurance problems.
Speaker Profile:
Bhagirath Narahari received his PhD from the University of Pennsylvania in 1987 and is currently a Professor in the Department of Computer Science at The George Washington University. From 1999 ā€“ 2002 he was the founding Chair of the Department of Computer Science. His research interests are in the areas of Computer Architecture, Embedded Systems, Software Security, Compiler optimization, Pervasive computing, and Parallel Computing. Since Fall 1999, he has collaboratively formed and led the GWU research group in embedded systems and compilers. Prof. Narahari's research has been funded by the National Science Foundation, Air Force Office of Sponsored Research, Rome Air Force Labs, NASA, NSA and America Online. His recent research activities have included power-aware computing, embedded systems and optimizing compilers, and hardware-software approaches to security in embedded systems. His research group provided an open source research compiler infrastructure for the Intel Itanium processor. In addition to his research activities, Prof. Narahari serves as the Associate Dean for Undergraduate Programs in the School of Engineering and Applied Science at The George Washington University.
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