Talks & Seminars
High Performance Reconfigurable Logic
Prof. Rajit Manohar, Dept. of Electrical and Computer Engg., Cornell University
Date & Time: January 9, 2012 11:45
Venue: SIC 201, 02nd Floor, C Block, Dept. of Computer Science & Engg., Kanwal Rekhi Bldg.
We present the design of an asynchronous FPGA (AFPGA) architecture and its measured performance over a wide range of temperatures and operating voltages. The AFPGA is implemented as a configurable dataflow architecture, and attains a performance that significantly exceeds the performance of commercial FPGAs as well as any reported result in the literature without any increase in its energy per operation. We present some of the hardware-software co-design issues that we solved in the process, and show how compiler techniques can be adapted for hardware synthesis on the AFPGA platform.
Speaker Profile:
Rajit Manohar is Professor of Electrical and Computer Engineering at Cornell, where his group conducts research on asynchronous design. He received his B.S. (1994), M.S. (1995), and Ph.D. (1998) from Caltech, and has been on the Cornell faculty since 1998. He is the recipient of an NSF CAREER award, four best paper awards, six teaching awards, and was named to MIT technology review's top 35 young innovators under 35. He was one of the principal designers of MiniMIPS, the first high-performance asynchronous microprocessor. He has worked on a number of asynchronous VLSI chips including the first microprocessor for sensor networks, an event-based asynchronous chip-multiprocessor, a pipeline-configurable asynchronous FPGA, and the first radiation hardened SRAM-based FPGA. He founded Achronix Semiconductor to commercialize high-performance asynchronous FPGAs.
List of Talks


Faculty CSE IT
Forgot Password
    [+] Sitemap     Feedback