Talks & Seminars
Title: Big Data, Energy Efficiency and Hardware Accelerators
Prof. Viktor K. Prasanna, University of Southern California
Date & Time: July 31, 2015 11:30
Venue: Lecture Hall, B Block, 02nd/03rd Floors, Department of Computer Science and Engineering, Kanwal Rekhi (KReSIT) Building
As the Information and Communication (ICT) infrastructure continues to evolve, throughput and energy efficiency have become key metrics. This talk explores FPGA-based parallel architectures and algorithms for a variety of streaming applications arising in Telecom and Big Data. We show high performance accelerators for deep packet inspection, regular expression matching, packet classification, traffic classification, heavy hitter detection, etc. in core routers, data center networks and in software defined networking (SDN). We propose high throughput and energy efficient accelerator designs to realize the “Green ICT” vision. Our approach is based on high level abstractions of the reconfigurable platforms and efficient data structures and algorithms. We illustrate the performance improvements for such systems and demonstrate the suitability of FPGAs for these computations. We show that SRAM/DRAM based solutions combined with FPGA based architectures lead to high throughput as well as reduced power dissipation compared with the state-of-the-art solutions based TCAMs. We then consider hardware support for Big Data applications. We show high throughput and energy optimal solutions for sorting, data base and graph analysis. We introduce the notion of energy balanced architectures to understand tradeoffs between power and performance in application specific architectures and show algorithmic optimizations to effectively use the hardware resources of FPGAs. We also show comparisons with multi-core and GPU implementations.
Speaker Profile:
Viktor K. Prasanna (ceng.usc.edu/~prasanna) is Charles Lee Powell Chair in Engineering in the Ming Hsieh Department of Electrical Engineering and Professor of Computer Science at the University of Southern California. He is the director of the Center for Energy Informatics. He was the executive director of the USC-Infosys Center for Advanced Software Technologies (CAST) and a member of the USC-Chevron Center of Excellence for Research and Academic Training on Interactive Smart Oilfield Technologies (CiSoft). His research interests include parallel and distributed systems including networked sensor systems, embedded systems, configurable architectures and high performance computing. He served as the Editor-in-Chief of the IEEE Transactions on Computers during 2003-06 and is currently the Editor-in-Chief of the Journal of Parallel and Distributed Computing. Prasanna was the founding Chair of the IEEE Computer Society Technical Committee on Parallel Processing. He is the steering chair of the IEEE International Conference on High Performance Computing (www.hipc.org). He is a Fellow of the IEEE, the ACM and the American Association for Advancement of Science (AAAS). He is a recipient of 2009 Outstanding Engineering Alumnus Award from the Pennsylvania State University. He received the 2015 W. Wallace McDowell award from the IEEE Computer Society for his contributions to reconfigurable computing.
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