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Talks & Seminars
Title: Building Compiler Optimizers and Code Generators for the Multicore Era
Prof. Uday Kumar Reddy B, Indian Institute of Science (IISc), Bangalore
Date & Time: November 3, 2016 15:30
Venue: Conference Room, 01st Floor, C Block, Dept. of CSE, Kanwal Rekhi Bldg.
Abstract:
This talk exposes some of the challenges and opportunities for compiler designers in the multicore era. Compiler optimization has been a traditional subject studied well for several decades. However, programmers' expectations and requirements have been continuously changing, and architectures have been evolving with parallelism and acceleration in various forms. Programmers would typically like to write less and less, and exploit hardware well to get more and more performance. In several domains, high performance is essential. There is thus tremendous opportunity in high-performance compilation -- in employing it to build the future languages and programming abstractions. Efforts in compiler parallelization and optimization can broadly be classified into two categories: one that makes progress on optimization support in compilers for general-purpose languages (eg. GCC, LLVM, and other commercial production/research compilers), and the other in building new domain-specific compilers/code generators with an objective to simultaneously deliver high programmer productivity and performance (including automatic parallelization). This talk will motivate the need to build optimization infrastructure that benefits and can be shared by both approaches, and discuss possible ways to accomplish this. The domain of image processing pipelines will be used as a motivational example. A short video demo will also be presented.
Speaker Profile:
Uday Kumar Reddy B is an Assistant Professor in the Department of Computer Science and Automation at the Indian Institute of Science (IISc) in Bangalore, India. His research interests are in developing programming and compiler/runtime technologies for multicore architectures with an emphasis on high performance and automatic parallelization, the design of domain-specific compilers, and the polyhedral compiler framework. He has received several research awards and grants including the Google faculty research award, others from AMD, Intel, National Instruments, NVIDIA, INRIA, and DST. Before joining IISc, he was with the Advanced Compiler Technologies group at the IBM T.J. Watson Research Center, Yorktown Heights, New York. He received his Ph.D. in Computer Science and Engineering from the Ohio State University, and his B-Tech in Computer Science and Engineering from the Indian Institute of Technology, Madras. Web: http://www.csa.iisc.ac.in/~uday
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