Hi,
I'am ARITRA BELEL

M.Tech CSE @IIT Bombay

Contact

About

I'm Aritra

Final year M.Tech CSE student at IIT Bombay, with strong interests in Hardware Security, System Software, and Software Engineering.

  • Dept. Rank 1 – CSE, RCCIIT
  • Knight on LeetCode (1800+ rating)
  • Filecoin Track Prize winner – Protocol Labs
  • Top 6 – HackNPitch Hackathon (JU E-Cell)

Education

IIT Bombay
M.Tech - Computer Science
2024 – 2026*  
CPI: 9.46
RCCIIT  (MAKAUT)
B.Tech - Computer Science
2020 – 2024  
CPI: 9.43

Projects

Scalable Distributed Key-Value Store with Fault Tolerance

  • Built a fault-tolerant in-memory KV store with 2× replication and atomic two-phase commit.
  • Ensured strong consistency with efficient request handling across distributed servers.
  • Added heartbeat-based failure detection, seamless data migration, and write-through LRU caching.
C++ STL Distributed Systems

GrpTorrent : P2P File Sharing System

  • Developed group-based P2P sharing with centralized tracker for authentication and metadata.
  • Implemented multithreaded socket server enabling concurrent uploads/downloads.
  • Used piece-wise SHA-1 hashing for integrity and efficient piece selection.
C++ TCP Sockets PThreads

Gurukul : AI-Enabled Q&A Portal

  • Django-based platform with email OTP login, markdown, profanity filter, and user management.
  • Implemented CRUD for questions, answers, replies with advanced search and profiles.
  • Integrated AI-generated first answers using DeepSeek-R1 via OpenRouter API.
Python Django SQLite

GPU Uncore Based Side & Covert Channels

  • Designed a DRAM-frequency covert channel on AMD RDNA3 GPUs achieving ~98.6% accuracy at 3.7 bps.
  • Demonstrated feasibility of GPU uncore-level information leakage.
  • Proposed extensions to additional uncore components and ML model identification via side channels.
C++ ROCm H/W Security

Matrix Multiplication & Embedding Optimization

  • Achieved 3× speedup via loop reordering, unrolling, tiling, SIMD and optimized transpose.
  • Applied optimizations to accelerate NN embedding operations.
  • Boosted throughput using software prefetching and SIMD for large embedding tables.
C++ SIMD Prefetching

Flush+Reload Cache Side-Channel Attack

  • Implemented Flush+Reload timing attack exploiting shared cache behavior.
  • Extracted victim access patterns through precise cache-line reload timing.
  • Analyzed microarchitectural leakage conditions affecting attack success.
C Security Microarchitecture