Processor Evolution

Having reviewed the computer organisation concepts, let us have a quick look at the Microprocessor evaluation since 1997 to todate.

November 1971

• Intel introduced its 4-bit bus, 4004 chip - the first microprocessor. Speed was 60,000 operations per second. It uses 2300 transistors, based on 10-micron technology. It can address 640 bytes. The die for the chip measures 3x4 mm. It was a 750 kHz.

In Nov. 1971, most of the processors had min to maximum frequency. Most of the processors used DRAM type of technology, the implementation is of dynamic type and registers have to be refreshed. Power supply has to be maintained as a flip-flop and is volatile. Control of the system is not part itself to be operated on Vcc standby so that the RAM in the microcontroller has to be maintained. To maintain the contents of the RAM, it is to be in standby mode. Essentially, this chip is used in calculator. For these processors, we have basic architecture. Here the fetching of instructions and execution of instructions is done sequentially. There is no overlap in the instruction operation.

April 1972

• Intel introduces its 8008 chip, the first 8-bit microprocessor. It accesses 16 KB of memory. It uses 3500 transistors, based on 10-micron technology. Speed is 60,000 instructions per second.

April 1974

• Intel releases its 2-MHz 8080 chip, an 8-bit microprocessor. It can access 64 KB of memory. It use 6000 transistors, based on 6-micron technology. Speed is 0.64 MIPS. 8080 uses two power supply whereas 8085 use one.

June 1978

• Intel introduces the 4.77 MHz 8086 microprocessor. It uses 16-bit registers, a 16-bit data bus, and 29,000 transistors, using 3 micron technology. It can access 1 MB of memory. Speed is 0.33 MIPS. Later speeds included 8-MHz (0.66 MIPS) and 10 MHz (0.75 MIPS). One feature introduced in 8086 which was not there in 8085 is segmentation to have multiprogramming facility. Prefetching is permitted. It has segmented memory to make program more compact and structured, pipelined CPU architecture supports two independently operating function units. EU & BIU overlap between instruction fetching and execution. Floating point and I/O Processor support through 8087 & 8089.

June 1979

• Intel introduces the 4.77 MHz 8088 microprocessor. It was created as a stepping stone to the 8086, as it operated on 16 bits internally, but supports an 8-bit data bus, to use existing 8-bit device controlling chips. It contains 29,000 transistors, using 3-micron technology and can address 1 MB of memory. Speed is 0.33 MIPS. A later version operates at 8-MHz, for a speed of 0.75 MIPS. It is widely used in PC XTs.
• 80186/188 processors support 8086 features - segmentation and fetch-execute overlap and it object code compatible. It has high integration CPU with many peripherals integrated into CPU such as TIMERS, INTERRUPT CONTROLLERS, CHIP SELECT UNIT, DMA CONTROLLER, meant for real time applications. It also has floating point unit support. This comes under the classification of a microcontroller rather than a microprocessor.

February 1985

• Intel introduces the - MHz 80286 microprocessor. It uses a real 16-bit data bus, 134,000 transistors using 1.5 micron technology and offers protected mode operation. The protected mode is entirely different from 8086 operation. In Protected mode the 80286 can directly address up to 16M of physical memory and up to 1Giga bit of virtual memory. It can thus access 16 MB of memory, or 1 GB of virtual memory. Speed is 0.9 MIPS. Later versions operate at 10-MHz 1.5 MIPS, and 12 -MHz 2.66 MIPS. It is a 16-bit processor with 24 bit physical address, segmentation and pipelined architecture supported. It has built in support for MULTI USER & MULTI TASKING ( In main memory, you may have more than one job activity i.e. in excutable stage. At any given time, the processor can execute only one of them. In cae of multiprogramming, if it is executing one job, the job gets terminated when it requests I/O. O.S. does the process scheduling. It checks whether the next job is higher than the first, if so, the initial job gets aborted and the second is excuted. It executes jobs depending on its priority. It has built in MEMORY PROTECTION Protected Mode of Operation - When ever memory is accessed, it checks its capacity. When it exceeds the space allotted to it, exception will be raised called TRAP - soft interrupt is generated within the CPU that supports operating systems and task isolation as well as program and data privacy within tasks. Also has built in hardware support for TASK SWITCHING. It supports virtual memory through exceptions and has floating point support through 80287. It is used in PC ATs.

Note on Virtual Memory : Virtual memory is another important concept related to memory organisation. So far we have assumed that the addresses generated by the processor directly specify physical location in the memory. The memory control circuitry translates the address specified by the programme into an address that can be used to access the physical memory. In such a case, an address generated by the processor is referred to as a virtual or logical address. The virtual address space is mapped onto physical memory where data are actually stored. The mapping function is implemented by a special memory control circuit called the memory management unit. This mapping function can be changed during programme execution according to system requirements. Virtual memory is used to increase the apparent size of physical memory. Data are addressed in virtual address space that can be as large as addressing capability of a processor.  But at any given time only the active portion of the space is mapped onto location in the physical memory. The remaining virtual addresses are mapped onto a bulk storage devices used which are usually magnetic disk.  As the active portion of the virtual address space changes during the programme execution, the memory management unit changes the mapping function and transfers data between the disk and the memory. Thus during every memory cycle an address processing mechanism determines whether the addressed information is in the physical memory or not. If it is, then the proper word is accessed and execution proceeds. If it is not, a page of words containing the desired word is transferred from the disk to the memory.  This page displaces some page in the memory that is currently inactive.  Because of the time required to move pages between the disk and the memory, there is the speed degradation if pages are moved very frequently. By judiciously choosing which page to replace in the memory, however there may be reasonably long period when the probability is high when the words accessed by the processors are not in the physical memory unit. 

Figure : Virtual Memory Organization

Figure : Virtual Memory Address Transaction

October 1985

• Intel introduces the 16 MHz 80386DX microprocessor. It uses 32-bit registers and a 32-bit data bus, and incorporates 275,000 transistors (1.5 microns). It can access 4 gigabytes of physical memory. It has all 286 features listed above plus PAGING support for efficient Virtual memory (Physical memory size is fixed because of cost. User thinks that he has huge main memory available then he need not partition his programme) implementation.

April 1989

• Intel announces the 25 MHz 486 microprocessor at Spring Comdex in chicago, Illinios. It integrates the 386, 387 math coprocessor, and adds an 8KB primary cache. It uses 1.2 million transistors, employing 1-micron technology and speed is 20 MIPS.

June 1991

• Intel introduces the 50 MHz 486 microprocessor. Speed is 41 MIPS. This new 486 employs 0.8 micron technology. Cache is available on the chip whereas for other machines cache is outside. Floating point is done on the chip itself. All the machines have instruction data cache on the chip itself. (One advantage to have both separately?). It has all the 80386 features written above. Support hierarchical bus structure and has inbuilt floating point support.

November 1992

• Intel introduces the 486SL processor, designed for notebook computers. Speeds include 20-MHz (15.4 MIPS), 25 MHz (19 MIPS) and 33 MHz (25 MIPS). The processor can address 34 MB of physical memory. They use 1.4 million transistors, employing 0.8 micron technology.
• 80586 has all 64 bit data, 32 bit address has superscalar architecture (many functional unit on the chip itself, for example - two integer units, one or two floating point units, all on the chip.)  Has all 486 features supported with on chip 8k data and instruction cache which is WRITE BACK. It has floating point support and support MESI protocol for Data Cache.
• In multiprocessing environments, where several cache subsystems exist, maintaining cache consistency becomes more challenging. More than one cache may contain a copy of information from a given memory location. In such systems, there must be a method to ensure that an access to a given memory location interacts with the later information. MESI cache, consistency model provides a method of tracking the various states that a cache line can be stored in to ensure consistency across all possible sources of given line without needlessly invalidating data stored in the caches.

March 1993

• Intel introduces the Pentium processor. It uses 32-bit registers, with a 64 bit data bus, giving at an address space of 4 GB. It incorporates 3.1 million transistors, using 0.8 micron BiCMOS technology. Speeds are 60 MHz (100 MIPS) and 66-MHz (112 MIPS). Essentially BiCMOS is used. The internal is CMOS whereas external is Bipolar (Will give address either to peripheral device which is to be decoded). Glue logic (All the logic will be required and additional hardware required to interface the VLSI chips to other support components) is required to support the other components which are TTL compatible as far as signals are concerned. Superscalar architecture - many functional unit on the chip itself. 

October 1994

• Intel introduces the 75-MHz Pentium processor. Speed is 126.5 MIPS. It uses 3.2 million transistors, employing 0.6-micron BiCMOS technology.

June 1995

• Intel announces the immediate availability of the 133-MHz Pentium processor. It uses 3.2 million transistors, employing 0.35 micron BiCMOS technology. Speed is 218.9 MIPS.

1995

• Intel released the Pentium Pro which contained 5.5 million transistor.

March 1996

• In the 133-MHz Pentium processor for notebook computers. The processor uses 0.35 micron technology, and operates on 3.3 volts of power externally, while its internal core only requires 2.9 volts.

August 1996

• Intel releases the 150 MHz mobile Pentium processor, designed for use in portable computers. The processor uses 0.35 micron technology, and operates on 3.3 volts of power externally while its internal core only requires 3.1 volts.

1997

• Intel release the 7.7 million transistor Pentium II Processor. The processor uses 0.25 micron technology.

1999

• Intel released 4.50 MHz Pentium III Processor. The processor uses 0.18 micron technology and operates from 450 MHz 1.13 GHz frequency.
• Number of transistors in Pentium III - 28.1 million at the time of introduction in Oct 99. Pentium III is manufactured in 0.18u process. At the time of the launch, the processor was available at up to 733MHz and is now available at 1GHz.
• Intel Releases Itanium(tm) Processor Microarchitecture details on the Internet Posted May 10, 2000; WW20
  From Intel Architecture Group Intel Corporation has released the Itanium(tm) Processor Microarchitecture Reference, a guide for software developers that details the functional behavior of Intel's forthcoming Itanium microprocessor. The Intel Itanium processor is the first in a family of IA-64 processors from Intel, and the most significant new development in Intel microprocessor architecture since the Intel386(tm) processor was introduced in 1985. Intel is taking the unprecedented step of releasing Itanium microarchitecture details on the Internet to broaden the availability of highly optimized software for the new processor. The IA-64 architecture is based on a new approach called EPIC (Explicitly Parallel Instruction Computing) that goes beyond RISC and CISC, pairing massive processing resources with intelligent compilers that make parallel execution explicit to the processor. The Microarchitecture Reference provides details that help developers of compilers and related software tools take full advantage of IA-64. "Intel and the industry have been conducting one of the most comprehensive enabling programs in history to deliver optimized IA-64 software and hardware solutions in parallel," said Ron Curry, director of IA-64 marketing. "The Internet gives us a great way to tap into the expertise of the broad developer community." Elements of the IA-64 software enabling program include distributing thousands of prototype servers and workstations to developers, the creation of "Net farms" that allow IA-64 programs to be tested on prototype systems over Internet connections, and the early release of technical information and development tools. A wide range of industry operating systems are now running on pre-production Itanium processor based systems, including 64-bit Microsoft Windows* 2000, IA-64 Linux*, Project Monterey*, Novell Modesto* and HP-UX*. Systems and software based on the Intel Itanium processor are scheduled to be in production beginning in the second half of 2000. [http://developer.intel.com/design/ia-64/downloads/245473.htm]

2001

Nanotechnology publishing computing into future realms

Scientists announced last week the creation of transistors many times smaller than those found in today's most advanced microprocessors, and which operate efficiently at room temperature.

This advance in nanotechnology was heralded as a critical step toward the eventual creation of microchips millions of times more powerful than today's models, that one day will be the backbone of intelligent devices too tiny to be seen by the naked eye.

Nanotechnology is an emerging science based on building molecular-scale machines atom by atom. Some experts foresee a nanotech evaluation within a couple of decades when today's microchips will face a dinosaur -like extinction, to be replaced with nanochips that offer millions of times more computing power in a microscopic package.

Scientists at Delft University of Technology in the Netherlands, writing in the current issue of the journal Science, built a transistor from only a single molecule one nanometer wide - about one-ten-thousandth the thickness of a human hair. Such nanotechnology devices had previously been created reliably only in super-cooled environments. 

The tiny device can be toggled on and off using a single electron. The experiment could eventually lead to vast power saving over today's transistors, which require several hundred to millions of electrons to perform the same function. "It's another significant obstacle which no longer stands in the way of implementing nanoscale technologies in real electronics," said Don Eigler, an IBM fellow and a leading nanotechnology authority.

Transistors are the building blocks of today's integrated circuits. Their ability to register an on or off state -- "0" or "1" in the lingo of computer scientists - produces the basic structure of digital data. Millions of transistors operate in tandem within microprocessor to perform all manner of computations. The smaller the transistor, the more powerful the processor and the less energy required to operate it. 

Nanotechnology is now being researched by scientists in many parts of the world. And the most optimistic ones project the creation of super-intelligent, yet microscopic devices that will push computing into futuristic realms. 

Less-sophisticated nanotech medical tools may emerge with in a few years, suggests Phil Kuekes, a computer scientists at Hewlett-Packard Labs. Intelligent nanoscale devices could be injected as "biological sensors in the body, or for diagnostic purposes in the body, or for diagnostic purposes in the clinic," Kuekes said. The probes could be powered by ambient light or body heat and deliver a constant stream of data about disease organisms or other medical conditions. (LATWP Svc). 

According to the different applications, we can have the following characterisation of the microprocessors:

2003

Itanium 2

Intel Itanium2,the third version of its high performance server chip Itanium, was launched on 40/6/2003. Running only on Linux and certain versions of Unix such as HPUX hampered wide acceptance of this chip.In april 2003, Microsoft released its 64 bit version of Windows server software. This Itanium2 runs at 1.5GHz.  An other measure of performance is Transactions per minute.Itanium2 does 707,000 transactions per minute vs 680,000 transactions per minute of IBM e Server pServer series runing its IBM Power4 Processor.

Today's leading edge microprocessors like Itanium® 2 Processor feature over 220 million transistors in 0.18 µm semiconductor process technology.