INTRODUCTION TO MICROPROCESSORS

The course involves Case studies of Microprocessors and support components, microcontrollers and design of microprocessor based systems. Microprocessor evolution is to be attributed to the advances in electronics that happened over the years right from the vacuum tubes to VLSI, thus making the powerful computer put on a single silicon chip. This course requires background of Computer Organization and analog and digital electronics concepts and design.

Computer Organization deals with the advances in computer architecture right from the Von Neumann machines to the current day super scalar architectures. 

Von Neumann Architecture

The earliest electronic machines capable of performing computations were laboriously programmed by changing the contents of a control store, in a manner analogous to changing the loom control cards in the Babbage design.  The program was entirely separate from the data. A significant advance came with the removal of this separation, so that the program was kept in the same store as the data, and one program could be used to manipulate another. This stored-program concept is attributed to the designers of ENIAC, a vacuum tube based machine built for the US Army between 1943 and 1946.  The concept was first expounded by von Neumann (1945), and incorporated into the IAS computer (at the Princeton Institute for Advanced Studies) which was completed in 1952.  All general-purpose computers are now based on the key concepts of the von Neumann architecture (figure 1):

1. A single read-write memory contains all data and instructions.
2. The memory is addressable by location in a way which does not depend on the contents of the location.
3. Execution proceeds using instructions from consecutive locations unless an instruction modified this sequentiality explicitly.

Figure 1 : The Von-Neumann architecture

Though the von Neumann model is universal in general-purpose computing, it suffers from one obvious problem. All information (instructions and data) must flow back and forth between the processor and memory through a single channel, and this channel will have finite bandwidth.  When this bandwidth is fully used the processor can go no faster. This performance limiting factor is called the von Neumann bottleneck.

Hardvard Architecture

A Harvard Architecture (figure 2) has one memory for instructions and a second for data.  The name comes from the Harvard Mark 1, an electromechanical computer which pre-dates the stored-program concept of von Neumann, as does the architecture in this form.  It is still used for applications which run fixed programs, in areas such as digital signal processing, but not for general-purpose computing. The advantage is the increased bandwidth available due to having separate communication channels for instructions and data; the disadvantage is that the storage is allocated to code and data in a fixed ratio.

Figure 2: The Hardvard architecture

Architectures with separate ports for instructions and data are often referred to by the term `Harvard architecture', even though the ports connect to a common memory.  For instance each port may be supplied from its own local cache memory (figure 3).  The cache memories reduce the external bandwidth requirements sufficiently to allow them both to be connected to the same main memory,  giving the bandwidth advantage of a Harvard architecture along with most of the flexibility of the simple von Neumann architecture. (The flexibility may be somewhat reduced because of cache consistency problems with self-modifying code).  Note that this type of Harvard architecture is still a von Neumann machine.

Figure 3: A modified Harvard architecture

Although the Harvard architecture (modified or not) offers double the bandwidth of the simple von Neumann architecture, this will only allow double performance when the instruction and data traffic are equal.  The VAX-11/780 has been used for a lot of measurements of memory traffic, and these measurements tend to suggest a reasonable match.  RISC processors have two characteristics which make the match less good than the VAX.  Firstly, they usually have less dense code, which increases the instruction traffic.  Secondly, they are register to register rather than memory to memory architectures.  This causes compiler writers to be much more careful about register usage, which can in turn result in much less data traffic.  The use of register windows also eliminates considerable data traffic associated with procedure calls. A RISC CPU can typically require an instruction bandwidth six to ten times the data bandwidth (Patterson and Sequin, 1981), so that a Harvard architecture may allow only a ten percent speed-up (rather than the one hundred percent that would be suggested by the VAX statistics).  Even so, the dual ported Harvard architecture has become a popular choice with RISC designers. 

A Microprocessor essentially is a component wherein a central processing unit (CPU) of a computer is brought on to a single chip. So this course essentially is case studies of processors that were developed since 1970s and how to build a microcomputer using these processors and support components.

Microprocessor is nothing but entire CPU is provided on a single chip. To configure a microprocessor based computer, we have the support components in terms of memory, memory controllers, parallel/serial interfaces, DMA controllers, etc.

To clearly understand the difference between the terms Computer Organisation and Computer Architecture, one can say that the answer one gets for the question - What is provided in the machine?- corresponds to architecture. And the answer one gets to the question - How they are provided in the machine? - corresponds to organisation.

Five Generations of Electronic Computers purely based on the Hardware:

• First Generation - Vacuum Tubes version
• Second Generation - Transistors version
• Third Generation -

  Small Scale Integration (SSI) version - The technology is 50 - 100 microns (channel length)

  Eg: NAND gates (7400)   Medium Scale Integration (MSI) version - 10-50 micron technology

Eg : Counter and shift registers, PLA, PGA

•   Fourth Generation

Large Scale Integration (LSI) version - 5 to 10 microns technology Eg. - 8085

Very Large Scale Integration (VLSI) version - Less than 2 micron technology

Eg - Pentium II

Ultra Large Scale Integration (ULSI) version - less than 1 micron technology

Eg - Merced, Pentium IV

For Example, in IIT Bombay the second generation digital computer, MINSK-2 (Russian) was installed in 1968-69 and the third generation computer, EC 1030 machines was installed 1974-75.

EC 1030 is fully code compatible with IBM 360.

MICROPROCESSOR CLASSIFICATIONS

We have two classes of Microprocessors.

• Fixed Instruction Set Processors: They are ready made processors with the fixed instruction set. This distinguishes microprocessors with microcontrollers. In a microcontroller a small computer system with limited resources is made available on a single chip. Microprocessors are classified into - 4 bit, 8 bit, 16 bit, 32 bit, 64 bit processors depending upon the number of bits the processor can handle at a time. There are also processors which accept externally n-bits but has capability to process 2n bits within the processor at a time. They come under the category of n/2n bit processors. For example - 8088 is classified as 8/16 bit processor and M68000 is 16/32 processor and Pentium is 32/64 bit processor.
• Bit Slice Processors : They are not ready made CPUs and do not have any fixed instruction set. Components in LSI/VLSI would be made available to build a processor. These components include register ALU or RALU and microprogrammed sequencer. The RALU Am 2901 is an enhanced version of the TTL chip 74181. This is a 4 bit ALU and can be easily cascadable to realize the desired n-bit processor. Cascading of this RALU chip can be done through ripple carry mode or they can also be connected to operate in Carry Look ahead mode by using another chip Am2902 which is similar to the TTL chip 74182. In the bit slice processor based design, one has to design his own instruction set, thus permitting him to tune the processor to the required application. One has to design the entire control unit by writing microprogrammes and using the micro sequencer, Am 2909/2910. The bit slice microprocessor is also known as microprogrammable microprocessors as all the designs based on bit slice microprocessor go in for microprogramming. As it can be seen, only persons with electronics and computer science background can design a processor using Bit Slice Processor. Due to this reason, they have not become very popular. An example of a bit slice processor is Advanced Micro Devices - Am2901 and Am2910. At IIT Bombay, a complete processor was built using this Microprogrammable processor 2903 and microprogrammable processor 2910 which is instruction set compatible to the IBM 360 machine. This work was carried out as a series of M.Tech. projects starting from the year 1979 to 1984. It was an exciting experience when finally the actual test routines of the IBM 360 machines were successfully run on the bit slice version of IBM 360.

As of now, we have only fixed instruction sets. 

Difference between Bit Slice Processors and Fixed Instruction Set Processors

                 BIT SLICE PROCESSORS						FIXED INSTRUCTION SET

Microprocessors can be either Hardware or Microprogrammed or both. Strictly speaking RISC processor is a hardwired one and a CISC processor is mostly a microprogrammed one but current day so called RISC processor is both hardwired and microprogrammed. The main advantage that microprogramme has over hardwired is that it offers flexibility. You can introduce new instructions with or without minor changes in hardware. The main disadvantage microprogramme has over hardware is that they are slower than hardwired version. Microprogramme use the ROM/RAM and hence additional access time makes them slower than hardwired versions. Because of the flexibility it offers, microprogramming is also used today in superscalar processors apart from hardware control.

Another class of silicon based system is a single chip microcontroller/single chip microcomputer/ embedded controller. This is a full-fledged computer system on a chip with CPU ROM/RAM, peripheral interfaces, A/D, D/A converters, timers, etc. The resources provided on a single chip would be very much limited. For example, the programmed memory (ROM/EPROM/ Flash ROM) could be of 4K bytes typically and the RAM would be of 256 Bytes. Provision is also made in this single chip microcontrollers to operate in the expanded mode wherein external memory could be connected. Even though this expanded mode is provided it is preferable to use this chip in a single chip mode to get the advantage of high reliability of this single chip microcomputer system. Example of Single chip microcontrollers is - 8048. The following table briefly summarizes the characteristics of the available microcontrollers in Intel and Motorola family. The major difference between the Intel and Motorola Microcontrollers is that Motorola microcontrollers are code compatible with their microprocessors counterparts whereas this is not the case with the Intel microcontroller family.

Table : Capabilities of Representative 8-bit Microcontroller from Two Families

Types of Memory Devices

RAM - Random Access Memory: The name is given by the manufacturer but actually it should be Read/Write Memory (RWM). It is volatile. The types of RAM that are available are-bipolar RAM, static MOS RAM, Dynamic MOS RAM, Pseudo Static MOS RAMs, EDO RAMs, Synchronous DRAMs, and Rhombus DRAMS, QDRAMs, etc. In future, FRAMs (Ferro Electrical RAMs) may be made available.

In present day PCs, Synchronous DRAMs (SDRAMs) are used. Earlier the SDRAM stood for pseudo DRAM which implied that DRAM refresh circuitry was on chip itself. Rhombus DRAMs or RDRAMs were designed by a party where one of the members happened to the student of IIT Bombay and it was informed that the technology was transferred to Intel.

ROM - Read only Memory -also called One Time Programmable (OTP). Once programmed, it is permanent and not reversible. The components that are used in ROMs are presence or absence of Diodes/Transistors. The ROMs are developed by the manufacturers and are not programmed by the user. For heavy volume production, ROMs turn out to be very cheap compared to the other non-volatile memories such as EPROMs, EEROMs, Flash ROMs.

PROM : This is similar to ROM with a difference that this can be one time programmable by the user and not by the manufacturer so it will be very useful for prototyping purposes.Examples are 27PC32 (4k x 8), 27PC64 (8k x 8), 27PC128 (16k x 8), 27PC256 (32k x 8), 27PC512 (64k x 8), 27PC010 (128k x 8), etc.

EPROM : Once it is programmed, you have to take precautions not to expose it even to sunlight and the contents will stay for approx. 10 years and in this sense it can be classified as non-volatile memory. Whenever you want to rewrite, EPROM has to be taken out of the circuit board, expose it to ultraviolet light for a period of approx. 5 to 10 mins. and this process erases the entire information on the chip and you have to programme the entire information on a separate programmer. After this is done the EPROM can be plugged on the circuit board. Examples of EPROM are 2708 (1k x 8), 2716 (2k x 8), 2732 (4k x 8), 2764 (8k x 8), 27128 (16k x 8), etc.

EEPROM: This is different from the EPROM in the sense that EEPROM can be programmed in-circuit. In EEPROM you can erase a bit and write that bit and this can be done on the board itself. Each location can be written only 10,000 times. In this sense, it is not perfectly non-volatile like EPROM. Programming of EEPROM takes more time than reading so it can not substitute RWM (RAM). Examples are 2816A (2k x 8), 2817A (2k x 8), 28C84 (8k x 8).

Flash ROM : In Flash ROM is similar to EEPROM but fixed block sizes typically 128-512 k bits (16 MB) can be erased at a time. This is widely used non-volatile memory nowadays. instead of each bit, we can erase a block and re-write. Examples are 28F256 (32k x 8), 28F512 (64k x 8), 28F400 (256k x 16 or 512k x 8), 28F008 (1 M x 8), 28F016 (1M x 16) or (2M x 8), 28F032 (2M x 16 or 4M x 8).

Memory Uses

ROM Types and Characteristics :

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