Paritosh K. Pandya : Home Page

(click here for the Media Coverage ) (click here for the mu M Indian Classical Music project)

My Curriculum Vitae and List of Publications are accessible in postscript form and through DBLP Bibliography. Bibliometric indices and citations to my papers as recorded by Google scholar.

Awards

• IEEE Technical Comittee on Real Time Systems, Test of time Award, 2020.

• Best Paper Award, Joint ACM IEEE Conference MEMOCODE 2019.

• 50 Fabulous EduTech Leaders, 8^th World Education Congress, 2019.

Recent Talk

• ASET Colloquium, TIFR: Scheduling in Hard Real-time Systems: The Response Time Approach – A retrospective, 19 July 2021 (Abstract) (Video)

• University of Trento: Logical Specification and Optimal Synthesis of Robust Controllers, 19 July 2021.

• University of Oxford: Two Variable Logics with a Between Predicate, 3rd March, 2020. (Slides)

• University of Edinburgh: Logical Specification and Uniform Synthesis of Robust Controllers, 25^th February, 2020. (Slides)

• GANDALF 20 Conferrence: Specification and Optimal Reactive Synthesis of Runtime Enforcement Shields. (Slides)

• International Logic Colloquium: Expressive Completeness and Decidability of Metric Temporal Logics, Udine, Italy, 28 July 2018.

Conferences

PC Co-Chair: FSTTCS 2018, Ahmedabad, 2018.
OC Chair: POPL 2015, TIFR, Mumbai, 2015.

PC Member: TIME 2022, GANDALF 2022, MOVEP 2022, GANDALF 2021, iFM 2020, HSCC 2020, IFM 2020, LATA2018, FSTTCS 2017, PEC 2016, TIME 2016, ICTAC 2016, ICLA 2015, SETTA 2015, TASE 2015, RP 2014, SETTA 2014, TASE 2014, ICTAC 2014, ICTAC 2013, ICDCN 2013, HSCC 2012, TIME 2011, FSTTCS 2010, TIME 2010, ICTAC 2010, HSCC 2010 ...

Research

Logics, Automata, Concurrency, Formal Methods, Embedded Systems and Software Engineering.

• Robust Controller Synthesis and Runtime Enforcement

• Metric Temporal Logics and Timed automata

• Duration Calculus and Model Checking

• Refinement Algebra and CSP

• Hoare Logics for Distributed Programs

• Real-time Scheduling Theory

• Sychronous Programming and Embedded Systems

Tools

• New DCSYNTH v1.0: Guided Reactive Synthesis with Soft Requirements for Robust Controller and Shield Synthesis.
  Latest Version: DCSYNTH v1.0 released on 23 October, 2017.

• NuSMV-DP: A tool for reachability analysis in asynchronous processes with
  special focus on Networks of Discrete-timed automata.
  Paper on NuSMV-DP (Extended version of TACAS 2006 paper.)

• Validity Checking of Dense Time Duration Calculus

• DCVALID, a validity checker for Duration Calculus (QDDC) formulae. DCVALID Version 1.4 includes CTLDC, a model checker for CTL extended with past and timing properties. It checks Verilog, SMV, ESTEREL and Lustre designs. Click for an overview and an example.
  
  Latest: Version 1.4 of DCVALID released on 2 October, 2000.

Journal Editorial Board Membership

Formal Aspects of Computing , The international Journal of Formal Methods, Springer (1996-2010)

Undergraduate Courses

• Design and Analysis of Algorithms (CS218M), IIT Bombay, 2022.

• Automata Theory (CS310M), IIT Bombay, 2021.

Graduate Courses

• Embedded Systems (CS684, jointly with Kavi Arya), IIT Bombay, (2022, 2021, 2020)

• Concepts, Algorithms and Tools for Model-Checking (CS738), IIT Bombay, 2020.

• Automata and computability, TIFR (2015-2019, 2010-2013, 2008, 2007)

• Formal Verification for VLSI Design, (IIT Mandi, April 2018, May 2019)

• Advanced Automata Theory, TIFR (Reading Course, 2018)

• Foundations of Program Verification, TIFR (August-December 2007)

• Algebraic Automata Theory, TIFR (Reading Course, 2017)

• Synchronous Programming (Module in Embedded Systems Course, IIT Bombay, 2018, 2017, 2016).

• Introduction to Mathematical Logic, TIFR (August-December, 2006)

• Automata and Verification TIFR(Jan-Apr 2006)

• Introduction to Logic TIFR (August-December, 2005.)

• Automata: Theory and Practice (Univ. of Trento, May, 2005)

• Model Checking: Theory and Practice TIFR (Jan 2004-Apr 2004)

• Model Checking (University of Trento, June 2003)

• Automata and Computability, TIFR(Aug 2003-Jan 2003)

• Model Checking: Theory and Practice, TIFR (Aug 2002- Jan 2003)

• Automata and Computability (Aug-Dec 2001)

• Introduction to Logic (Aug-Dec 1999)

• Model checking : Theory and Practice  (Jan-Apr 1999)

• Elementary Predicate Logic (Aug-Dec 1998, Aug-Dec 1996)

• Science of Programming (Aug-Dec 1994)

(Lecture Notes)

Ph.D. Students

K. Narayan Kumar
P. Vijay Suman
Simoni Shah
Khushraj Madnani
Amol Wakankar

Collaborators

• Jonathan Bowen

• Dang Van Hung

• Michael Hansen

• Jifeng He

• Nicholas Halbwachs

• C.A.R. Hoare

• Mathai Joseph

• Mark Josephs

• Kamal Lodaya

• Raman Kazhamiakin

• K. Narayan Kumar

• Marco Pistore

• Amir Pnueli

• Y.S. Ramakrishna

• W.P. de Roever

• R.K. Shyamasundar

• Xu Qiwen

• Zhou Chaochen

Beyond Office

The mu M Project: Measuring Hidustani Classical Music.
(NEW A Tabla Synthesizer, Synthesis of Aalaps )

Last modified by Paritosh Pandya on 23 July, 2021