/* This file is autogenerated by tracetool, do not edit. */ #ifndef TRACE_HW_NET_GENERATED_TRACERS_H #define TRACE_HW_NET_GENERATED_TRACERS_H #include "trace/control.h" extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_RESET_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_READ_EVENT; extern TraceEvent _TRACE_ALLWINNER_SUN8I_EMAC_WRITE_EVENT; extern TraceEvent _TRACE_LANCE_MEM_READW_EVENT; extern TraceEvent _TRACE_LANCE_MEM_WRITEW_EVENT; extern TraceEvent _TRACE_MIPSNET_SEND_EVENT; extern TraceEvent _TRACE_MIPSNET_RECEIVE_EVENT; extern TraceEvent _TRACE_MIPSNET_READ_EVENT; extern TraceEvent _TRACE_MIPSNET_WRITE_EVENT; extern TraceEvent _TRACE_MIPSNET_IRQ_EVENT; extern TraceEvent _TRACE_NE2000_READ_EVENT; extern TraceEvent _TRACE_NE2000_WRITE_EVENT; extern TraceEvent _TRACE_NE2000_IOPORT_READ_EVENT; extern TraceEvent _TRACE_NE2000_IOPORT_WRITE_EVENT; extern TraceEvent _TRACE_OPEN_ETH_MII_WRITE_EVENT; extern TraceEvent _TRACE_OPEN_ETH_MII_READ_EVENT; extern TraceEvent _TRACE_OPEN_ETH_UPDATE_IRQ_EVENT; extern TraceEvent _TRACE_OPEN_ETH_RECEIVE_EVENT; extern TraceEvent _TRACE_OPEN_ETH_RECEIVE_MCAST_EVENT; extern TraceEvent _TRACE_OPEN_ETH_RECEIVE_REJECT_EVENT; extern TraceEvent _TRACE_OPEN_ETH_RECEIVE_DESC_EVENT; extern TraceEvent _TRACE_OPEN_ETH_START_XMIT_EVENT; extern TraceEvent _TRACE_OPEN_ETH_REG_READ_EVENT; extern TraceEvent _TRACE_OPEN_ETH_REG_WRITE_EVENT; extern TraceEvent _TRACE_OPEN_ETH_DESC_READ_EVENT; extern TraceEvent _TRACE_OPEN_ETH_DESC_WRITE_EVENT; extern TraceEvent _TRACE_PCNET_S_RESET_EVENT; extern TraceEvent _TRACE_PCNET_USER_INT_EVENT; extern TraceEvent _TRACE_PCNET_ISR_CHANGE_EVENT; extern TraceEvent _TRACE_PCNET_INIT_EVENT; extern TraceEvent _TRACE_PCNET_RLEN_TLEN_EVENT; extern TraceEvent _TRACE_PCNET_SS32_RDRA_TDRA_EVENT; extern TraceEvent _TRACE_PCNET_APROM_WRITEB_EVENT; extern TraceEvent _TRACE_PCNET_APROM_READB_EVENT; extern TraceEvent _TRACE_PCNET_IOPORT_READ_EVENT; extern TraceEvent _TRACE_PCNET_IOPORT_WRITE_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_PARSED_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP4_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP4_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP4_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_EX_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_HASH_EVENT; extern TraceEvent _TRACE_NET_RX_PKT_RSS_ADD_CHUNK_EVENT; extern TraceEvent _TRACE_E1000_RECEIVER_OVERRUN_EVENT; extern TraceEvent _TRACE_E1000X_RX_CAN_RECV_DISABLED_EVENT; extern TraceEvent _TRACE_E1000X_VLAN_IS_VLAN_PKT_EVENT; extern TraceEvent _TRACE_E1000X_RX_FLT_VLAN_MISMATCH_EVENT; extern TraceEvent _TRACE_E1000X_RX_FLT_VLAN_MATCH_EVENT; extern TraceEvent _TRACE_E1000X_RX_FLT_UCAST_MATCH_EVENT; extern TraceEvent _TRACE_E1000X_RX_FLT_UCAST_MISMATCH_EVENT; extern TraceEvent _TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_EVENT; extern TraceEvent _TRACE_E1000X_RX_LINK_DOWN_EVENT; extern TraceEvent _TRACE_E1000X_RX_DISABLED_EVENT; extern TraceEvent _TRACE_E1000X_RX_OVERSIZED_EVENT; extern TraceEvent _TRACE_E1000X_MAC_INDICATE_EVENT; extern TraceEvent _TRACE_E1000X_LINK_NEGOTIATION_START_EVENT; extern TraceEvent _TRACE_E1000X_LINK_NEGOTIATION_DONE_EVENT; extern TraceEvent _TRACE_E1000E_CORE_WRITE_EVENT; extern TraceEvent _TRACE_E1000E_CORE_READ_EVENT; extern TraceEvent _TRACE_E1000E_CORE_MDIC_READ_EVENT; extern TraceEvent _TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_EVENT; extern TraceEvent _TRACE_E1000E_CORE_MDIC_WRITE_EVENT; extern TraceEvent _TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_EVENT; extern TraceEvent _TRACE_E1000E_CORE_CTRL_WRITE_EVENT; extern TraceEvent _TRACE_E1000E_CORE_CTRL_SW_RESET_EVENT; extern TraceEvent _TRACE_E1000E_CORE_CTRL_PHY_RESET_EVENT; extern TraceEvent _TRACE_E1000E_LINK_AUTONEG_FLOWCTL_EVENT; extern TraceEvent _TRACE_E1000E_LINK_SET_PARAMS_EVENT; extern TraceEvent _TRACE_E1000E_LINK_READ_PARAMS_EVENT; extern TraceEvent _TRACE_E1000E_LINK_SET_EXT_PARAMS_EVENT; extern TraceEvent _TRACE_E1000E_LINK_STATUS_EVENT; extern TraceEvent _TRACE_E1000E_LINK_STATUS_CHANGED_EVENT; extern TraceEvent _TRACE_E1000E_WRN_REGS_WRITE_RO_EVENT; extern TraceEvent _TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_EVENT; extern TraceEvent _TRACE_E1000E_WRN_REGS_READ_UNKNOWN_EVENT; extern TraceEvent _TRACE_E1000E_WRN_REGS_READ_TRIVIAL_EVENT; extern TraceEvent _TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_EVENT; extern TraceEvent _TRACE_E1000E_WRN_NO_TS_SUPPORT_EVENT; extern TraceEvent _TRACE_E1000E_WRN_NO_SNAP_SUPPORT_EVENT; extern TraceEvent _TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_EVENT; extern TraceEvent _TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_EVENT; extern TraceEvent _TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_EVENT; extern TraceEvent _TRACE_E1000E_TX_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_TX_DESCR_EVENT; extern TraceEvent _TRACE_E1000E_RING_FREE_SPACE_EVENT; extern TraceEvent _TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_EVENT; extern TraceEvent _TRACE_E1000E_RX_CAN_RECV_EVENT; extern TraceEvent _TRACE_E1000E_RX_HAS_BUFFERS_EVENT; extern TraceEvent _TRACE_E1000E_RX_NULL_DESCRIPTOR_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESC_PS_READ_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESC_PS_WRITE_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESC_BUFF_SIZES_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESC_LEN_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESC_BUFF_WRITE_EVENT; extern TraceEvent _TRACE_E1000E_RX_DESCR_EVENT; extern TraceEvent _TRACE_E1000E_RX_SET_RCTL_EVENT; extern TraceEvent _TRACE_E1000E_RX_RECEIVE_IOV_EVENT; extern TraceEvent _TRACE_E1000E_RX_FLT_DROPPED_EVENT; extern TraceEvent _TRACE_E1000E_RX_WRITTEN_TO_GUEST_EVENT; extern TraceEvent _TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_EVENT; extern TraceEvent _TRACE_E1000E_RX_INTERRUPT_SET_EVENT; extern TraceEvent _TRACE_E1000E_RX_INTERRUPT_DELAYED_EVENT; extern TraceEvent _TRACE_E1000E_RX_SET_CSO_EVENT; extern TraceEvent _TRACE_E1000E_RX_SET_RDT_EVENT; extern TraceEvent _TRACE_E1000E_RX_SET_RFCTL_EVENT; extern TraceEvent _TRACE_E1000E_RX_START_RECV_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_STARTED_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_TYPE_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_IP4_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_IP6_RFCTL_EVENT; extern TraceEvent _TRACE_E1000E_RX_RSS_IP6_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_PROTOCOLS_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_VLAN_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_RSS_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_IP_ID_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_ACK_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_PKT_TYPE_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_STATUS_FLAGS_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_EVENT; extern TraceEvent _TRACE_E1000E_VLAN_VET_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_MSI_NOTIFY_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_LEGACY_NOTIFY_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_POSTPONED_BY_XITR_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_CLEAR_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_SET_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ADD_MSI_OTHER_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_PENDING_INTERRUPTS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_WRITE_ICS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_PROCESS_IAME_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_READ_ICS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_READ_IMS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_CLEAR_IAME_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_REARM_TIMER_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_THROTTLING_TIMER_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_EITR_SET_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_ITR_SET_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_EVENT; extern TraceEvent _TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_EVENT; extern TraceEvent _TRACE_E1000E_WRN_MSIX_VEC_WRONG_EVENT; extern TraceEvent _TRACE_E1000E_WRN_MSIX_INVALID_EVENT; extern TraceEvent _TRACE_E1000E_MAC_SET_SW_EVENT; extern TraceEvent _TRACE_E1000E_VM_STATE_RUNNING_EVENT; extern TraceEvent _TRACE_E1000E_VM_STATE_STOPPED_EVENT; extern TraceEvent _TRACE_E1000E_CB_PCI_REALIZE_EVENT; extern TraceEvent _TRACE_E1000E_CB_PCI_UNINIT_EVENT; extern TraceEvent _TRACE_E1000E_CB_QDEV_RESET_HOLD_EVENT; extern TraceEvent _TRACE_E1000E_CB_PRE_SAVE_EVENT; extern TraceEvent _TRACE_E1000E_CB_POST_LOAD_EVENT; extern TraceEvent _TRACE_E1000E_IO_WRITE_ADDR_EVENT; extern TraceEvent _TRACE_E1000E_IO_WRITE_DATA_EVENT; extern TraceEvent _TRACE_E1000E_IO_READ_ADDR_EVENT; extern TraceEvent _TRACE_E1000E_IO_READ_DATA_EVENT; extern TraceEvent _TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_EVENT; extern TraceEvent _TRACE_E1000E_WRN_IO_READ_UNKNOWN_EVENT; extern TraceEvent _TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_EVENT; extern TraceEvent _TRACE_E1000E_WRN_IO_ADDR_FLASH_EVENT; extern TraceEvent _TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_EVENT; extern TraceEvent _TRACE_E1000E_MSI_INIT_FAIL_EVENT; extern TraceEvent _TRACE_E1000E_MSIX_INIT_FAIL_EVENT; extern TraceEvent _TRACE_E1000E_MSIX_USE_VECTOR_FAIL_EVENT; extern TraceEvent _TRACE_E1000E_MAC_SET_PERMANENT_EVENT; extern TraceEvent _TRACE_E1000E_CFG_SUPPORT_VIRTIO_EVENT; extern TraceEvent _TRACE_IGB_WRITE_CONFIG_EVENT; extern TraceEvent _TRACE_IGBVF_WRITE_CONFIG_EVENT; extern TraceEvent _TRACE_IGB_CORE_MDIC_READ_EVENT; extern TraceEvent _TRACE_IGB_CORE_MDIC_READ_UNHANDLED_EVENT; extern TraceEvent _TRACE_IGB_CORE_MDIC_WRITE_EVENT; extern TraceEvent _TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_EVENT; extern TraceEvent _TRACE_IGB_CORE_VF_RESET_EVENT; extern TraceEvent _TRACE_IGB_LINK_SET_EXT_PARAMS_EVENT; extern TraceEvent _TRACE_IGB_RX_DESC_BUFF_SIZE_EVENT; extern TraceEvent _TRACE_IGB_RX_DESC_BUFF_WRITE_EVENT; extern TraceEvent _TRACE_IGB_RX_METADATA_RSS_EVENT; extern TraceEvent _TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_EVENT; extern TraceEvent _TRACE_IGB_IRQ_SET_IAM_EVENT; extern TraceEvent _TRACE_IGB_IRQ_READ_IAM_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EICS_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EIMS_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EIMC_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EIAC_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EIAM_EVENT; extern TraceEvent _TRACE_IGB_IRQ_WRITE_EICR_EVENT; extern TraceEvent _TRACE_IGB_IRQ_EITR_SET_EVENT; extern TraceEvent _TRACE_IGB_SET_PFMAILBOX_EVENT; extern TraceEvent _TRACE_IGB_SET_VFMAILBOX_EVENT; extern TraceEvent _TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_EVENT; extern TraceEvent _TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_RECEIVE_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_RECEIVE_WROTE_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_EVENT; extern TraceEvent _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_CHECKSUM_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_CHECKSUM_OOB_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_UNFINISHED_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_OVERFLOW_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_FINISHED_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_KICK_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_DISABLED_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_PROCESS_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_DESC_EVENT; extern TraceEvent _TRACE_SUNGEM_TX_RESET_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_MAC_DISABLED_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_TXDMA_DISABLED_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_CHECK_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_MAC_CHECK_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_MAC_MULTICAST_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_MAC_COMPARE_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_PACKET_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_DISABLED_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_BAD_FRAME_SIZE_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_UNMATCHED_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_PROCESS_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_RINGFULL_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_DESC_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_RESET_EVENT; extern TraceEvent _TRACE_SUNGEM_RX_KICK_EVENT; extern TraceEvent _TRACE_SUNGEM_RESET_EVENT; extern TraceEvent _TRACE_SUNGEM_MII_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MII_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MII_INVALID_SOF_EVENT; extern TraceEvent _TRACE_SUNGEM_MII_INVALID_OP_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_GREG_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_GREG_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_TXDMA_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_TXDMA_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_RXDMA_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_RXDMA_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_WOL_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_WOL_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_MAC_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_MAC_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_MIF_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_MIF_READ_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_PCS_WRITE_EVENT; extern TraceEvent _TRACE_SUNGEM_MMIO_PCS_READ_EVENT; extern TraceEvent _TRACE_SUNHME_SEB_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_SEB_READ_EVENT; extern TraceEvent _TRACE_SUNHME_ETX_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_ETX_READ_EVENT; extern TraceEvent _TRACE_SUNHME_ERX_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_ERX_READ_EVENT; extern TraceEvent _TRACE_SUNHME_MAC_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_MAC_READ_EVENT; extern TraceEvent _TRACE_SUNHME_MII_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_MII_READ_EVENT; extern TraceEvent _TRACE_SUNHME_MIF_WRITE_EVENT; extern TraceEvent _TRACE_SUNHME_MIF_READ_EVENT; extern TraceEvent _TRACE_SUNHME_TX_DESC_EVENT; extern TraceEvent _TRACE_SUNHME_TX_XSUM_ADD_EVENT; extern TraceEvent _TRACE_SUNHME_TX_XSUM_STUFF_EVENT; extern TraceEvent _TRACE_SUNHME_TX_DONE_EVENT; extern TraceEvent _TRACE_SUNHME_RX_INCOMING_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_DESTMAC_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_BCAST_MATCH_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_HASH_MATCH_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_REJECT_EVENT; extern TraceEvent _TRACE_SUNHME_RX_FILTER_ACCEPT_EVENT; extern TraceEvent _TRACE_SUNHME_RX_DESC_EVENT; extern TraceEvent _TRACE_SUNHME_RX_XSUM_CALC_EVENT; extern TraceEvent _TRACE_SUNHME_RX_NORXD_EVENT; extern TraceEvent _TRACE_SUNHME_UPDATE_IRQ_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_ANNOUNCE_TIMER_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_POST_LOAD_DEVICE_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_RSS_LOAD_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_RSS_DISABLE_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_RSS_ERROR_EVENT; extern TraceEvent _TRACE_VIRTIO_NET_RSS_ENABLE_EVENT; extern TraceEvent _TRACE_TULIP_REG_WRITE_EVENT; extern TraceEvent _TRACE_TULIP_REG_READ_EVENT; extern TraceEvent _TRACE_TULIP_RECEIVE_EVENT; extern TraceEvent _TRACE_TULIP_DESCRIPTOR_EVENT; extern TraceEvent _TRACE_TULIP_RX_STATE_EVENT; extern TraceEvent _TRACE_TULIP_TX_STATE_EVENT; extern TraceEvent _TRACE_TULIP_IRQ_EVENT; extern TraceEvent _TRACE_TULIP_MII_WRITE_EVENT; extern TraceEvent _TRACE_TULIP_MII_READ_EVENT; extern TraceEvent _TRACE_TULIP_RESET_EVENT; extern TraceEvent _TRACE_TULIP_SETUP_FRAME_EVENT; extern TraceEvent _TRACE_TULIP_SETUP_FILTER_EVENT; extern TraceEvent _TRACE_LASI_82596_MEM_READW_EVENT; extern TraceEvent _TRACE_LASI_82596_MEM_WRITEW_EVENT; extern TraceEvent _TRACE_I82596_S_RESET_EVENT; extern TraceEvent _TRACE_I82596_TRANSMIT_EVENT; extern TraceEvent _TRACE_I82596_RECEIVE_ANALYSIS_EVENT; extern TraceEvent _TRACE_I82596_RECEIVE_PACKET_EVENT; extern TraceEvent _TRACE_I82596_NEW_MAC_EVENT; extern TraceEvent _TRACE_I82596_SET_MULTICAST_EVENT; extern TraceEvent _TRACE_I82596_CHANNEL_ATTENTION_EVENT; extern TraceEvent _TRACE_IMX_PHY_READ_EVENT; extern TraceEvent _TRACE_IMX_PHY_READ_NUM_EVENT; extern TraceEvent _TRACE_IMX_PHY_WRITE_EVENT; extern TraceEvent _TRACE_IMX_PHY_WRITE_NUM_EVENT; extern TraceEvent _TRACE_IMX_PHY_UPDATE_LINK_EVENT; extern TraceEvent _TRACE_IMX_PHY_RESET_EVENT; extern TraceEvent _TRACE_IMX_FEC_READ_BD_EVENT; extern TraceEvent _TRACE_IMX_ENET_READ_BD_EVENT; extern TraceEvent _TRACE_IMX_ETH_TX_BD_BUSY_EVENT; extern TraceEvent _TRACE_IMX_ETH_RX_BD_FULL_EVENT; extern TraceEvent _TRACE_IMX_ETH_READ_EVENT; extern TraceEvent _TRACE_IMX_ETH_WRITE_EVENT; extern TraceEvent _TRACE_IMX_FEC_RECEIVE_EVENT; extern TraceEvent _TRACE_IMX_FEC_RECEIVE_LEN_EVENT; extern TraceEvent _TRACE_IMX_FEC_RECEIVE_LAST_EVENT; extern TraceEvent _TRACE_IMX_ENET_RECEIVE_EVENT; extern TraceEvent _TRACE_IMX_ENET_RECEIVE_LEN_EVENT; extern TraceEvent _TRACE_IMX_ENET_RECEIVE_LAST_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_RESET_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_SET_MISTA_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_SENT_PACKET_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_TX_DONE_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_CAN_RECEIVE_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_PACKET_DROPPED_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_RECEIVING_PACKET_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_RECEIVED_PACKET_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_RX_DONE_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_REG_READ_EVENT; extern TraceEvent _TRACE_NPCM7XX_EMC_REG_WRITE_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_REG_READ_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_REG_WRITE_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_MDIO_ACCESS_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_RESET_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_SET_LINK_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_UPDATE_IRQ_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_DESC_READ_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_RECEIVE_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_RECEIVED_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_SENT_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_DEBUG_DESC_DATA_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_EVENT; extern TraceEvent _TRACE_NPCM_GMAC_TX_DESC_OWNER_EVENT; extern TraceEvent _TRACE_NPCM_PCS_REG_READ_EVENT; extern TraceEvent _TRACE_NPCM_PCS_REG_WRITE_EVENT; extern TraceEvent _TRACE_DP8393X_RAISE_IRQ_EVENT; extern TraceEvent _TRACE_DP8393X_LOWER_IRQ_EVENT; extern TraceEvent _TRACE_DP8393X_LOAD_CAM_EVENT; extern TraceEvent _TRACE_DP8393X_LOAD_CAM_DONE_EVENT; extern TraceEvent _TRACE_DP8393X_READ_RRA_REGS_EVENT; extern TraceEvent _TRACE_DP8393X_TRANSMIT_PACKET_EVENT; extern TraceEvent _TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_EVENT; extern TraceEvent _TRACE_DP8393X_READ_EVENT; extern TraceEvent _TRACE_DP8393X_WRITE_EVENT; extern TraceEvent _TRACE_DP8393X_WRITE_INVALID_EVENT; extern TraceEvent _TRACE_DP8393X_WRITE_INVALID_DCR_EVENT; extern TraceEvent _TRACE_DP8393X_RECEIVE_OVERSIZE_EVENT; extern TraceEvent _TRACE_DP8393X_RECEIVE_NOT_NETCARD_EVENT; extern TraceEvent _TRACE_DP8393X_RECEIVE_PACKET_EVENT; extern TraceEvent _TRACE_DP8393X_RECEIVE_WRITE_STATUS_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_REALIZE_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_UNREALIZE_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_CREATE_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_DESTROY_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_DISCONNECT_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_CONNECT_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_FRONTEND_CHANGED_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_TX_EVENT; extern TraceEvent _TRACE_XEN_NETDEV_RX_EVENT; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_RESET_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_READ_DSTATE; extern uint16_t _TRACE_ALLWINNER_SUN8I_EMAC_WRITE_DSTATE; extern uint16_t _TRACE_LANCE_MEM_READW_DSTATE; extern uint16_t _TRACE_LANCE_MEM_WRITEW_DSTATE; extern uint16_t _TRACE_MIPSNET_SEND_DSTATE; extern uint16_t _TRACE_MIPSNET_RECEIVE_DSTATE; extern uint16_t _TRACE_MIPSNET_READ_DSTATE; extern uint16_t _TRACE_MIPSNET_WRITE_DSTATE; extern uint16_t _TRACE_MIPSNET_IRQ_DSTATE; extern uint16_t _TRACE_NE2000_READ_DSTATE; extern uint16_t _TRACE_NE2000_WRITE_DSTATE; extern uint16_t _TRACE_NE2000_IOPORT_READ_DSTATE; extern uint16_t _TRACE_NE2000_IOPORT_WRITE_DSTATE; extern uint16_t _TRACE_OPEN_ETH_MII_WRITE_DSTATE; extern uint16_t _TRACE_OPEN_ETH_MII_READ_DSTATE; extern uint16_t _TRACE_OPEN_ETH_UPDATE_IRQ_DSTATE; extern uint16_t _TRACE_OPEN_ETH_RECEIVE_DSTATE; extern uint16_t _TRACE_OPEN_ETH_RECEIVE_MCAST_DSTATE; extern uint16_t _TRACE_OPEN_ETH_RECEIVE_REJECT_DSTATE; extern uint16_t _TRACE_OPEN_ETH_RECEIVE_DESC_DSTATE; extern uint16_t _TRACE_OPEN_ETH_START_XMIT_DSTATE; extern uint16_t _TRACE_OPEN_ETH_REG_READ_DSTATE; extern uint16_t _TRACE_OPEN_ETH_REG_WRITE_DSTATE; extern uint16_t _TRACE_OPEN_ETH_DESC_READ_DSTATE; extern uint16_t _TRACE_OPEN_ETH_DESC_WRITE_DSTATE; extern uint16_t _TRACE_PCNET_S_RESET_DSTATE; extern uint16_t _TRACE_PCNET_USER_INT_DSTATE; extern uint16_t _TRACE_PCNET_ISR_CHANGE_DSTATE; extern uint16_t _TRACE_PCNET_INIT_DSTATE; extern uint16_t _TRACE_PCNET_RLEN_TLEN_DSTATE; extern uint16_t _TRACE_PCNET_SS32_RDRA_TDRA_DSTATE; extern uint16_t _TRACE_PCNET_APROM_WRITEB_DSTATE; extern uint16_t _TRACE_PCNET_APROM_READB_DSTATE; extern uint16_t _TRACE_PCNET_IOPORT_READ_DSTATE; extern uint16_t _TRACE_PCNET_IOPORT_WRITE_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_PARSED_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP4_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP4_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP4_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_EX_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_HASH_DSTATE; extern uint16_t _TRACE_NET_RX_PKT_RSS_ADD_CHUNK_DSTATE; extern uint16_t _TRACE_E1000_RECEIVER_OVERRUN_DSTATE; extern uint16_t _TRACE_E1000X_RX_CAN_RECV_DISABLED_DSTATE; extern uint16_t _TRACE_E1000X_VLAN_IS_VLAN_PKT_DSTATE; extern uint16_t _TRACE_E1000X_RX_FLT_VLAN_MISMATCH_DSTATE; extern uint16_t _TRACE_E1000X_RX_FLT_VLAN_MATCH_DSTATE; extern uint16_t _TRACE_E1000X_RX_FLT_UCAST_MATCH_DSTATE; extern uint16_t _TRACE_E1000X_RX_FLT_UCAST_MISMATCH_DSTATE; extern uint16_t _TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_DSTATE; extern uint16_t _TRACE_E1000X_RX_LINK_DOWN_DSTATE; extern uint16_t _TRACE_E1000X_RX_DISABLED_DSTATE; extern uint16_t _TRACE_E1000X_RX_OVERSIZED_DSTATE; extern uint16_t _TRACE_E1000X_MAC_INDICATE_DSTATE; extern uint16_t _TRACE_E1000X_LINK_NEGOTIATION_START_DSTATE; extern uint16_t _TRACE_E1000X_LINK_NEGOTIATION_DONE_DSTATE; extern uint16_t _TRACE_E1000E_CORE_WRITE_DSTATE; extern uint16_t _TRACE_E1000E_CORE_READ_DSTATE; extern uint16_t _TRACE_E1000E_CORE_MDIC_READ_DSTATE; extern uint16_t _TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_DSTATE; extern uint16_t _TRACE_E1000E_CORE_MDIC_WRITE_DSTATE; extern uint16_t _TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_DSTATE; extern uint16_t _TRACE_E1000E_CORE_CTRL_WRITE_DSTATE; extern uint16_t _TRACE_E1000E_CORE_CTRL_SW_RESET_DSTATE; extern uint16_t _TRACE_E1000E_CORE_CTRL_PHY_RESET_DSTATE; extern uint16_t _TRACE_E1000E_LINK_AUTONEG_FLOWCTL_DSTATE; extern uint16_t _TRACE_E1000E_LINK_SET_PARAMS_DSTATE; extern uint16_t _TRACE_E1000E_LINK_READ_PARAMS_DSTATE; extern uint16_t _TRACE_E1000E_LINK_SET_EXT_PARAMS_DSTATE; extern uint16_t _TRACE_E1000E_LINK_STATUS_DSTATE; extern uint16_t _TRACE_E1000E_LINK_STATUS_CHANGED_DSTATE; extern uint16_t _TRACE_E1000E_WRN_REGS_WRITE_RO_DSTATE; extern uint16_t _TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_DSTATE; extern uint16_t _TRACE_E1000E_WRN_REGS_READ_UNKNOWN_DSTATE; extern uint16_t _TRACE_E1000E_WRN_REGS_READ_TRIVIAL_DSTATE; extern uint16_t _TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_DSTATE; extern uint16_t _TRACE_E1000E_WRN_NO_TS_SUPPORT_DSTATE; extern uint16_t _TRACE_E1000E_WRN_NO_SNAP_SUPPORT_DSTATE; extern uint16_t _TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_DSTATE; extern uint16_t _TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_DSTATE; extern uint16_t _TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_DSTATE; extern uint16_t _TRACE_E1000E_TX_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_TX_DESCR_DSTATE; extern uint16_t _TRACE_E1000E_RING_FREE_SPACE_DSTATE; extern uint16_t _TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_DSTATE; extern uint16_t _TRACE_E1000E_RX_CAN_RECV_DSTATE; extern uint16_t _TRACE_E1000E_RX_HAS_BUFFERS_DSTATE; extern uint16_t _TRACE_E1000E_RX_NULL_DESCRIPTOR_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESC_PS_READ_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESC_PS_WRITE_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESC_BUFF_SIZES_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESC_LEN_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESC_BUFF_WRITE_DSTATE; extern uint16_t _TRACE_E1000E_RX_DESCR_DSTATE; extern uint16_t _TRACE_E1000E_RX_SET_RCTL_DSTATE; extern uint16_t _TRACE_E1000E_RX_RECEIVE_IOV_DSTATE; extern uint16_t _TRACE_E1000E_RX_FLT_DROPPED_DSTATE; extern uint16_t _TRACE_E1000E_RX_WRITTEN_TO_GUEST_DSTATE; extern uint16_t _TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_DSTATE; extern uint16_t _TRACE_E1000E_RX_INTERRUPT_SET_DSTATE; extern uint16_t _TRACE_E1000E_RX_INTERRUPT_DELAYED_DSTATE; extern uint16_t _TRACE_E1000E_RX_SET_CSO_DSTATE; extern uint16_t _TRACE_E1000E_RX_SET_RDT_DSTATE; extern uint16_t _TRACE_E1000E_RX_SET_RFCTL_DSTATE; extern uint16_t _TRACE_E1000E_RX_START_RECV_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_STARTED_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_TYPE_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_IP4_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_IP6_RFCTL_DSTATE; extern uint16_t _TRACE_E1000E_RX_RSS_IP6_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_PROTOCOLS_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_VLAN_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_RSS_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_IP_ID_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_ACK_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_PKT_TYPE_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_STATUS_FLAGS_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_DSTATE; extern uint16_t _TRACE_E1000E_VLAN_VET_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_MSI_NOTIFY_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_LEGACY_NOTIFY_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_POSTPONED_BY_XITR_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_CLEAR_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_SET_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ADD_MSI_OTHER_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_PENDING_INTERRUPTS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_WRITE_ICS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_PROCESS_IAME_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_READ_ICS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_READ_IMS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_CLEAR_IAME_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_REARM_TIMER_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_THROTTLING_TIMER_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_EITR_SET_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_ITR_SET_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_DSTATE; extern uint16_t _TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_DSTATE; extern uint16_t _TRACE_E1000E_WRN_MSIX_VEC_WRONG_DSTATE; extern uint16_t _TRACE_E1000E_WRN_MSIX_INVALID_DSTATE; extern uint16_t _TRACE_E1000E_MAC_SET_SW_DSTATE; extern uint16_t _TRACE_E1000E_VM_STATE_RUNNING_DSTATE; extern uint16_t _TRACE_E1000E_VM_STATE_STOPPED_DSTATE; extern uint16_t _TRACE_E1000E_CB_PCI_REALIZE_DSTATE; extern uint16_t _TRACE_E1000E_CB_PCI_UNINIT_DSTATE; extern uint16_t _TRACE_E1000E_CB_QDEV_RESET_HOLD_DSTATE; extern uint16_t _TRACE_E1000E_CB_PRE_SAVE_DSTATE; extern uint16_t _TRACE_E1000E_CB_POST_LOAD_DSTATE; extern uint16_t _TRACE_E1000E_IO_WRITE_ADDR_DSTATE; extern uint16_t _TRACE_E1000E_IO_WRITE_DATA_DSTATE; extern uint16_t _TRACE_E1000E_IO_READ_ADDR_DSTATE; extern uint16_t _TRACE_E1000E_IO_READ_DATA_DSTATE; extern uint16_t _TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_DSTATE; extern uint16_t _TRACE_E1000E_WRN_IO_READ_UNKNOWN_DSTATE; extern uint16_t _TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_DSTATE; extern uint16_t _TRACE_E1000E_WRN_IO_ADDR_FLASH_DSTATE; extern uint16_t _TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_DSTATE; extern uint16_t _TRACE_E1000E_MSI_INIT_FAIL_DSTATE; extern uint16_t _TRACE_E1000E_MSIX_INIT_FAIL_DSTATE; extern uint16_t _TRACE_E1000E_MSIX_USE_VECTOR_FAIL_DSTATE; extern uint16_t _TRACE_E1000E_MAC_SET_PERMANENT_DSTATE; extern uint16_t _TRACE_E1000E_CFG_SUPPORT_VIRTIO_DSTATE; extern uint16_t _TRACE_IGB_WRITE_CONFIG_DSTATE; extern uint16_t _TRACE_IGBVF_WRITE_CONFIG_DSTATE; extern uint16_t _TRACE_IGB_CORE_MDIC_READ_DSTATE; extern uint16_t _TRACE_IGB_CORE_MDIC_READ_UNHANDLED_DSTATE; extern uint16_t _TRACE_IGB_CORE_MDIC_WRITE_DSTATE; extern uint16_t _TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_DSTATE; extern uint16_t _TRACE_IGB_CORE_VF_RESET_DSTATE; extern uint16_t _TRACE_IGB_LINK_SET_EXT_PARAMS_DSTATE; extern uint16_t _TRACE_IGB_RX_DESC_BUFF_SIZE_DSTATE; extern uint16_t _TRACE_IGB_RX_DESC_BUFF_WRITE_DSTATE; extern uint16_t _TRACE_IGB_RX_METADATA_RSS_DSTATE; extern uint16_t _TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_DSTATE; extern uint16_t _TRACE_IGB_IRQ_SET_IAM_DSTATE; extern uint16_t _TRACE_IGB_IRQ_READ_IAM_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EICS_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EIMS_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EIMC_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EIAC_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EIAM_DSTATE; extern uint16_t _TRACE_IGB_IRQ_WRITE_EICR_DSTATE; extern uint16_t _TRACE_IGB_IRQ_EITR_SET_DSTATE; extern uint16_t _TRACE_IGB_SET_PFMAILBOX_DSTATE; extern uint16_t _TRACE_IGB_SET_VFMAILBOX_DSTATE; extern uint16_t _TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_DSTATE; extern uint16_t _TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_RECEIVE_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_RECEIVE_WROTE_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_DSTATE; extern uint16_t _TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_CHECKSUM_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_CHECKSUM_OOB_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_UNFINISHED_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_OVERFLOW_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_FINISHED_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_KICK_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_DISABLED_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_PROCESS_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_DESC_DSTATE; extern uint16_t _TRACE_SUNGEM_TX_RESET_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_MAC_DISABLED_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_TXDMA_DISABLED_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_CHECK_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_MAC_CHECK_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_MAC_MULTICAST_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_MAC_COMPARE_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_PACKET_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_DISABLED_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_BAD_FRAME_SIZE_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_UNMATCHED_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_PROCESS_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_RINGFULL_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_DESC_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_RESET_DSTATE; extern uint16_t _TRACE_SUNGEM_RX_KICK_DSTATE; extern uint16_t _TRACE_SUNGEM_RESET_DSTATE; extern uint16_t _TRACE_SUNGEM_MII_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MII_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MII_INVALID_SOF_DSTATE; extern uint16_t _TRACE_SUNGEM_MII_INVALID_OP_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_GREG_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_GREG_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_TXDMA_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_TXDMA_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_RXDMA_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_RXDMA_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_WOL_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_WOL_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_MAC_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_MAC_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_MIF_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_MIF_READ_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_PCS_WRITE_DSTATE; extern uint16_t _TRACE_SUNGEM_MMIO_PCS_READ_DSTATE; extern uint16_t _TRACE_SUNHME_SEB_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_SEB_READ_DSTATE; extern uint16_t _TRACE_SUNHME_ETX_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_ETX_READ_DSTATE; extern uint16_t _TRACE_SUNHME_ERX_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_ERX_READ_DSTATE; extern uint16_t _TRACE_SUNHME_MAC_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_MAC_READ_DSTATE; extern uint16_t _TRACE_SUNHME_MII_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_MII_READ_DSTATE; extern uint16_t _TRACE_SUNHME_MIF_WRITE_DSTATE; extern uint16_t _TRACE_SUNHME_MIF_READ_DSTATE; extern uint16_t _TRACE_SUNHME_TX_DESC_DSTATE; extern uint16_t _TRACE_SUNHME_TX_XSUM_ADD_DSTATE; extern uint16_t _TRACE_SUNHME_TX_XSUM_STUFF_DSTATE; extern uint16_t _TRACE_SUNHME_TX_DONE_DSTATE; extern uint16_t _TRACE_SUNHME_RX_INCOMING_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_DESTMAC_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_BCAST_MATCH_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_HASH_MATCH_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_REJECT_DSTATE; extern uint16_t _TRACE_SUNHME_RX_FILTER_ACCEPT_DSTATE; extern uint16_t _TRACE_SUNHME_RX_DESC_DSTATE; extern uint16_t _TRACE_SUNHME_RX_XSUM_CALC_DSTATE; extern uint16_t _TRACE_SUNHME_RX_NORXD_DSTATE; extern uint16_t _TRACE_SUNHME_UPDATE_IRQ_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_ANNOUNCE_TIMER_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_POST_LOAD_DEVICE_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_RSS_LOAD_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_RSS_DISABLE_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_RSS_ERROR_DSTATE; extern uint16_t _TRACE_VIRTIO_NET_RSS_ENABLE_DSTATE; extern uint16_t _TRACE_TULIP_REG_WRITE_DSTATE; extern uint16_t _TRACE_TULIP_REG_READ_DSTATE; extern uint16_t _TRACE_TULIP_RECEIVE_DSTATE; extern uint16_t _TRACE_TULIP_DESCRIPTOR_DSTATE; extern uint16_t _TRACE_TULIP_RX_STATE_DSTATE; extern uint16_t _TRACE_TULIP_TX_STATE_DSTATE; extern uint16_t _TRACE_TULIP_IRQ_DSTATE; extern uint16_t _TRACE_TULIP_MII_WRITE_DSTATE; extern uint16_t _TRACE_TULIP_MII_READ_DSTATE; extern uint16_t _TRACE_TULIP_RESET_DSTATE; extern uint16_t _TRACE_TULIP_SETUP_FRAME_DSTATE; extern uint16_t _TRACE_TULIP_SETUP_FILTER_DSTATE; extern uint16_t _TRACE_LASI_82596_MEM_READW_DSTATE; extern uint16_t _TRACE_LASI_82596_MEM_WRITEW_DSTATE; extern uint16_t _TRACE_I82596_S_RESET_DSTATE; extern uint16_t _TRACE_I82596_TRANSMIT_DSTATE; extern uint16_t _TRACE_I82596_RECEIVE_ANALYSIS_DSTATE; extern uint16_t _TRACE_I82596_RECEIVE_PACKET_DSTATE; extern uint16_t _TRACE_I82596_NEW_MAC_DSTATE; extern uint16_t _TRACE_I82596_SET_MULTICAST_DSTATE; extern uint16_t _TRACE_I82596_CHANNEL_ATTENTION_DSTATE; extern uint16_t _TRACE_IMX_PHY_READ_DSTATE; extern uint16_t _TRACE_IMX_PHY_READ_NUM_DSTATE; extern uint16_t _TRACE_IMX_PHY_WRITE_DSTATE; extern uint16_t _TRACE_IMX_PHY_WRITE_NUM_DSTATE; extern uint16_t _TRACE_IMX_PHY_UPDATE_LINK_DSTATE; extern uint16_t _TRACE_IMX_PHY_RESET_DSTATE; extern uint16_t _TRACE_IMX_FEC_READ_BD_DSTATE; extern uint16_t _TRACE_IMX_ENET_READ_BD_DSTATE; extern uint16_t _TRACE_IMX_ETH_TX_BD_BUSY_DSTATE; extern uint16_t _TRACE_IMX_ETH_RX_BD_FULL_DSTATE; extern uint16_t _TRACE_IMX_ETH_READ_DSTATE; extern uint16_t _TRACE_IMX_ETH_WRITE_DSTATE; extern uint16_t _TRACE_IMX_FEC_RECEIVE_DSTATE; extern uint16_t _TRACE_IMX_FEC_RECEIVE_LEN_DSTATE; extern uint16_t _TRACE_IMX_FEC_RECEIVE_LAST_DSTATE; extern uint16_t _TRACE_IMX_ENET_RECEIVE_DSTATE; extern uint16_t _TRACE_IMX_ENET_RECEIVE_LEN_DSTATE; extern uint16_t _TRACE_IMX_ENET_RECEIVE_LAST_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_RESET_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_SET_MISTA_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_SENT_PACKET_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_TX_DONE_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_CAN_RECEIVE_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_PACKET_DROPPED_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_RECEIVING_PACKET_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_RECEIVED_PACKET_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_RX_DONE_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_REG_READ_DSTATE; extern uint16_t _TRACE_NPCM7XX_EMC_REG_WRITE_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_REG_READ_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_REG_WRITE_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_MDIO_ACCESS_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_RESET_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_SET_LINK_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_UPDATE_IRQ_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_DESC_READ_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_RECEIVE_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_RECEIVED_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_SENT_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_DEBUG_DESC_DATA_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_DSTATE; extern uint16_t _TRACE_NPCM_GMAC_TX_DESC_OWNER_DSTATE; extern uint16_t _TRACE_NPCM_PCS_REG_READ_DSTATE; extern uint16_t _TRACE_NPCM_PCS_REG_WRITE_DSTATE; extern uint16_t _TRACE_DP8393X_RAISE_IRQ_DSTATE; extern uint16_t _TRACE_DP8393X_LOWER_IRQ_DSTATE; extern uint16_t _TRACE_DP8393X_LOAD_CAM_DSTATE; extern uint16_t _TRACE_DP8393X_LOAD_CAM_DONE_DSTATE; extern uint16_t _TRACE_DP8393X_READ_RRA_REGS_DSTATE; extern uint16_t _TRACE_DP8393X_TRANSMIT_PACKET_DSTATE; extern uint16_t _TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_DSTATE; extern uint16_t _TRACE_DP8393X_READ_DSTATE; extern uint16_t _TRACE_DP8393X_WRITE_DSTATE; extern uint16_t _TRACE_DP8393X_WRITE_INVALID_DSTATE; extern uint16_t _TRACE_DP8393X_WRITE_INVALID_DCR_DSTATE; extern uint16_t _TRACE_DP8393X_RECEIVE_OVERSIZE_DSTATE; extern uint16_t _TRACE_DP8393X_RECEIVE_NOT_NETCARD_DSTATE; extern uint16_t _TRACE_DP8393X_RECEIVE_PACKET_DSTATE; extern uint16_t _TRACE_DP8393X_RECEIVE_WRITE_STATUS_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_REALIZE_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_UNREALIZE_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_CREATE_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_DESTROY_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_DISCONNECT_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_CONNECT_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_FRONTEND_CHANGED_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_TX_DSTATE; extern uint16_t _TRACE_XEN_NETDEV_RX_DSTATE; #define TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_RESET_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_READ_ENABLED 1 #define TRACE_ALLWINNER_SUN8I_EMAC_WRITE_ENABLED 1 #define TRACE_LANCE_MEM_READW_ENABLED 1 #define TRACE_LANCE_MEM_WRITEW_ENABLED 1 #define TRACE_MIPSNET_SEND_ENABLED 1 #define TRACE_MIPSNET_RECEIVE_ENABLED 1 #define TRACE_MIPSNET_READ_ENABLED 1 #define TRACE_MIPSNET_WRITE_ENABLED 1 #define TRACE_MIPSNET_IRQ_ENABLED 1 #define TRACE_NE2000_READ_ENABLED 1 #define TRACE_NE2000_WRITE_ENABLED 1 #define TRACE_NE2000_IOPORT_READ_ENABLED 1 #define TRACE_NE2000_IOPORT_WRITE_ENABLED 1 #define TRACE_OPEN_ETH_MII_WRITE_ENABLED 1 #define TRACE_OPEN_ETH_MII_READ_ENABLED 1 #define TRACE_OPEN_ETH_UPDATE_IRQ_ENABLED 1 #define TRACE_OPEN_ETH_RECEIVE_ENABLED 1 #define TRACE_OPEN_ETH_RECEIVE_MCAST_ENABLED 1 #define TRACE_OPEN_ETH_RECEIVE_REJECT_ENABLED 1 #define TRACE_OPEN_ETH_RECEIVE_DESC_ENABLED 1 #define TRACE_OPEN_ETH_START_XMIT_ENABLED 1 #define TRACE_OPEN_ETH_REG_READ_ENABLED 1 #define TRACE_OPEN_ETH_REG_WRITE_ENABLED 1 #define TRACE_OPEN_ETH_DESC_READ_ENABLED 1 #define TRACE_OPEN_ETH_DESC_WRITE_ENABLED 1 #define TRACE_PCNET_S_RESET_ENABLED 1 #define TRACE_PCNET_USER_INT_ENABLED 1 #define TRACE_PCNET_ISR_CHANGE_ENABLED 1 #define TRACE_PCNET_INIT_ENABLED 1 #define TRACE_PCNET_RLEN_TLEN_ENABLED 1 #define TRACE_PCNET_SS32_RDRA_TDRA_ENABLED 1 #define TRACE_PCNET_APROM_WRITEB_ENABLED 1 #define TRACE_PCNET_APROM_READB_ENABLED 1 #define TRACE_PCNET_IOPORT_READ_ENABLED 1 #define TRACE_PCNET_IOPORT_WRITE_ENABLED 1 #define TRACE_NET_RX_PKT_PARSED_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_ENABLED 1 #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_ENABLED 1 #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_ENABLED 1 #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP4_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP4_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP4_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_EX_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_HASH_ENABLED 1 #define TRACE_NET_RX_PKT_RSS_ADD_CHUNK_ENABLED 1 #define TRACE_E1000_RECEIVER_OVERRUN_ENABLED 1 #define TRACE_E1000X_RX_CAN_RECV_DISABLED_ENABLED 1 #define TRACE_E1000X_VLAN_IS_VLAN_PKT_ENABLED 1 #define TRACE_E1000X_RX_FLT_VLAN_MISMATCH_ENABLED 1 #define TRACE_E1000X_RX_FLT_VLAN_MATCH_ENABLED 1 #define TRACE_E1000X_RX_FLT_UCAST_MATCH_ENABLED 1 #define TRACE_E1000X_RX_FLT_UCAST_MISMATCH_ENABLED 1 #define TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_ENABLED 1 #define TRACE_E1000X_RX_LINK_DOWN_ENABLED 1 #define TRACE_E1000X_RX_DISABLED_ENABLED 1 #define TRACE_E1000X_RX_OVERSIZED_ENABLED 1 #define TRACE_E1000X_MAC_INDICATE_ENABLED 1 #define TRACE_E1000X_LINK_NEGOTIATION_START_ENABLED 1 #define TRACE_E1000X_LINK_NEGOTIATION_DONE_ENABLED 1 #define TRACE_E1000E_CORE_WRITE_ENABLED 1 #define TRACE_E1000E_CORE_READ_ENABLED 1 #define TRACE_E1000E_CORE_MDIC_READ_ENABLED 1 #define TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_ENABLED 1 #define TRACE_E1000E_CORE_MDIC_WRITE_ENABLED 1 #define TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_ENABLED 1 #define TRACE_E1000E_CORE_CTRL_WRITE_ENABLED 1 #define TRACE_E1000E_CORE_CTRL_SW_RESET_ENABLED 1 #define TRACE_E1000E_CORE_CTRL_PHY_RESET_ENABLED 1 #define TRACE_E1000E_LINK_AUTONEG_FLOWCTL_ENABLED 1 #define TRACE_E1000E_LINK_SET_PARAMS_ENABLED 1 #define TRACE_E1000E_LINK_READ_PARAMS_ENABLED 1 #define TRACE_E1000E_LINK_SET_EXT_PARAMS_ENABLED 1 #define TRACE_E1000E_LINK_STATUS_ENABLED 1 #define TRACE_E1000E_LINK_STATUS_CHANGED_ENABLED 1 #define TRACE_E1000E_WRN_REGS_WRITE_RO_ENABLED 1 #define TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_ENABLED 1 #define TRACE_E1000E_WRN_REGS_READ_UNKNOWN_ENABLED 1 #define TRACE_E1000E_WRN_REGS_READ_TRIVIAL_ENABLED 1 #define TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_ENABLED 1 #define TRACE_E1000E_WRN_NO_TS_SUPPORT_ENABLED 1 #define TRACE_E1000E_WRN_NO_SNAP_SUPPORT_ENABLED 1 #define TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_ENABLED 1 #define TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_ENABLED 1 #define TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_ENABLED 1 #define TRACE_E1000E_TX_DISABLED_ENABLED 1 #define TRACE_E1000E_TX_DESCR_ENABLED 1 #define TRACE_E1000E_RING_FREE_SPACE_ENABLED 1 #define TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_ENABLED 1 #define TRACE_E1000E_RX_CAN_RECV_ENABLED 1 #define TRACE_E1000E_RX_HAS_BUFFERS_ENABLED 1 #define TRACE_E1000E_RX_NULL_DESCRIPTOR_ENABLED 1 #define TRACE_E1000E_RX_DESC_PS_READ_ENABLED 1 #define TRACE_E1000E_RX_DESC_PS_WRITE_ENABLED 1 #define TRACE_E1000E_RX_DESC_BUFF_SIZES_ENABLED 1 #define TRACE_E1000E_RX_DESC_LEN_ENABLED 1 #define TRACE_E1000E_RX_DESC_BUFF_WRITE_ENABLED 1 #define TRACE_E1000E_RX_DESCR_ENABLED 1 #define TRACE_E1000E_RX_SET_RCTL_ENABLED 1 #define TRACE_E1000E_RX_RECEIVE_IOV_ENABLED 1 #define TRACE_E1000E_RX_FLT_DROPPED_ENABLED 1 #define TRACE_E1000E_RX_WRITTEN_TO_GUEST_ENABLED 1 #define TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_ENABLED 1 #define TRACE_E1000E_RX_INTERRUPT_SET_ENABLED 1 #define TRACE_E1000E_RX_INTERRUPT_DELAYED_ENABLED 1 #define TRACE_E1000E_RX_SET_CSO_ENABLED 1 #define TRACE_E1000E_RX_SET_RDT_ENABLED 1 #define TRACE_E1000E_RX_SET_RFCTL_ENABLED 1 #define TRACE_E1000E_RX_START_RECV_ENABLED 1 #define TRACE_E1000E_RX_RSS_STARTED_ENABLED 1 #define TRACE_E1000E_RX_RSS_DISABLED_ENABLED 1 #define TRACE_E1000E_RX_RSS_TYPE_ENABLED 1 #define TRACE_E1000E_RX_RSS_IP4_ENABLED 1 #define TRACE_E1000E_RX_RSS_IP6_RFCTL_ENABLED 1 #define TRACE_E1000E_RX_RSS_IP6_ENABLED 1 #define TRACE_E1000E_RX_METADATA_PROTOCOLS_ENABLED 1 #define TRACE_E1000E_RX_METADATA_VLAN_ENABLED 1 #define TRACE_E1000E_RX_METADATA_RSS_ENABLED 1 #define TRACE_E1000E_RX_METADATA_IP_ID_ENABLED 1 #define TRACE_E1000E_RX_METADATA_ACK_ENABLED 1 #define TRACE_E1000E_RX_METADATA_PKT_TYPE_ENABLED 1 #define TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_ENABLED 1 #define TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_ENABLED 1 #define TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_ENABLED 1 #define TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_ENABLED 1 #define TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_ENABLED 1 #define TRACE_E1000E_RX_METADATA_STATUS_FLAGS_ENABLED 1 #define TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_ENABLED 1 #define TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_ENABLED 1 #define TRACE_E1000E_VLAN_VET_ENABLED 1 #define TRACE_E1000E_IRQ_MSI_NOTIFY_ENABLED 1 #define TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_ENABLED 1 #define TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_ENABLED 1 #define TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_ENABLED 1 #define TRACE_E1000E_IRQ_LEGACY_NOTIFY_ENABLED 1 #define TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_ENABLED 1 #define TRACE_E1000E_IRQ_POSTPONED_BY_XITR_ENABLED 1 #define TRACE_E1000E_IRQ_CLEAR_ENABLED 1 #define TRACE_E1000E_IRQ_SET_ENABLED 1 #define TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_ENABLED 1 #define TRACE_E1000E_IRQ_ADD_MSI_OTHER_ENABLED 1 #define TRACE_E1000E_IRQ_PENDING_INTERRUPTS_ENABLED 1 #define TRACE_E1000E_IRQ_WRITE_ICS_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_PROCESS_IAME_ENABLED 1 #define TRACE_E1000E_IRQ_READ_ICS_ENABLED 1 #define TRACE_E1000E_IRQ_READ_IMS_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_CLEAR_IAME_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_ENABLED 1 #define TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_ENABLED 1 #define TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_ENABLED 1 #define TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_ENABLED 1 #define TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_ENABLED 1 #define TRACE_E1000E_IRQ_REARM_TIMER_ENABLED 1 #define TRACE_E1000E_IRQ_THROTTLING_TIMER_ENABLED 1 #define TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_ENABLED 1 #define TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_ENABLED 1 #define TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_ENABLED 1 #define TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_ENABLED 1 #define TRACE_E1000E_IRQ_EITR_SET_ENABLED 1 #define TRACE_E1000E_IRQ_ITR_SET_ENABLED 1 #define TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_ENABLED 1 #define TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_ENABLED 1 #define TRACE_E1000E_WRN_MSIX_VEC_WRONG_ENABLED 1 #define TRACE_E1000E_WRN_MSIX_INVALID_ENABLED 1 #define TRACE_E1000E_MAC_SET_SW_ENABLED 1 #define TRACE_E1000E_VM_STATE_RUNNING_ENABLED 1 #define TRACE_E1000E_VM_STATE_STOPPED_ENABLED 1 #define TRACE_E1000E_CB_PCI_REALIZE_ENABLED 1 #define TRACE_E1000E_CB_PCI_UNINIT_ENABLED 1 #define TRACE_E1000E_CB_QDEV_RESET_HOLD_ENABLED 1 #define TRACE_E1000E_CB_PRE_SAVE_ENABLED 1 #define TRACE_E1000E_CB_POST_LOAD_ENABLED 1 #define TRACE_E1000E_IO_WRITE_ADDR_ENABLED 1 #define TRACE_E1000E_IO_WRITE_DATA_ENABLED 1 #define TRACE_E1000E_IO_READ_ADDR_ENABLED 1 #define TRACE_E1000E_IO_READ_DATA_ENABLED 1 #define TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_ENABLED 1 #define TRACE_E1000E_WRN_IO_READ_UNKNOWN_ENABLED 1 #define TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_ENABLED 1 #define TRACE_E1000E_WRN_IO_ADDR_FLASH_ENABLED 1 #define TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_ENABLED 1 #define TRACE_E1000E_MSI_INIT_FAIL_ENABLED 1 #define TRACE_E1000E_MSIX_INIT_FAIL_ENABLED 1 #define TRACE_E1000E_MSIX_USE_VECTOR_FAIL_ENABLED 1 #define TRACE_E1000E_MAC_SET_PERMANENT_ENABLED 1 #define TRACE_E1000E_CFG_SUPPORT_VIRTIO_ENABLED 1 #define TRACE_IGB_WRITE_CONFIG_ENABLED 1 #define TRACE_IGBVF_WRITE_CONFIG_ENABLED 1 #define TRACE_IGB_CORE_MDIC_READ_ENABLED 1 #define TRACE_IGB_CORE_MDIC_READ_UNHANDLED_ENABLED 1 #define TRACE_IGB_CORE_MDIC_WRITE_ENABLED 1 #define TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_ENABLED 1 #define TRACE_IGB_CORE_VF_RESET_ENABLED 1 #define TRACE_IGB_LINK_SET_EXT_PARAMS_ENABLED 1 #define TRACE_IGB_RX_DESC_BUFF_SIZE_ENABLED 1 #define TRACE_IGB_RX_DESC_BUFF_WRITE_ENABLED 1 #define TRACE_IGB_RX_METADATA_RSS_ENABLED 1 #define TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_ENABLED 1 #define TRACE_IGB_IRQ_SET_IAM_ENABLED 1 #define TRACE_IGB_IRQ_READ_IAM_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EICS_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EIMS_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EIMC_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EIAC_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EIAM_ENABLED 1 #define TRACE_IGB_IRQ_WRITE_EICR_ENABLED 1 #define TRACE_IGB_IRQ_EITR_SET_ENABLED 1 #define TRACE_IGB_SET_PFMAILBOX_ENABLED 1 #define TRACE_IGB_SET_VFMAILBOX_ENABLED 1 #define TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_ENABLED 1 #define TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_ENABLED 1 #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_ENABLED 1 #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_ENABLED 1 #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_ENABLED 1 #define TRACE_SPAPR_VLAN_RECEIVE_ENABLED 1 #define TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_ENABLED 1 #define TRACE_SPAPR_VLAN_RECEIVE_WROTE_ENABLED 1 #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_ENABLED 1 #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_ENABLED 1 #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_ENABLED 1 #define TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_ENABLED 1 #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_ENABLED 1 #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_ENABLED 1 #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_ENABLED 1 #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_ENABLED 1 #define TRACE_SUNGEM_TX_CHECKSUM_ENABLED 1 #define TRACE_SUNGEM_TX_CHECKSUM_OOB_ENABLED 1 #define TRACE_SUNGEM_TX_UNFINISHED_ENABLED 1 #define TRACE_SUNGEM_TX_OVERFLOW_ENABLED 1 #define TRACE_SUNGEM_TX_FINISHED_ENABLED 1 #define TRACE_SUNGEM_TX_KICK_ENABLED 1 #define TRACE_SUNGEM_TX_DISABLED_ENABLED 1 #define TRACE_SUNGEM_TX_PROCESS_ENABLED 1 #define TRACE_SUNGEM_TX_DESC_ENABLED 1 #define TRACE_SUNGEM_TX_RESET_ENABLED 1 #define TRACE_SUNGEM_RX_MAC_DISABLED_ENABLED 1 #define TRACE_SUNGEM_RX_TXDMA_DISABLED_ENABLED 1 #define TRACE_SUNGEM_RX_CHECK_ENABLED 1 #define TRACE_SUNGEM_RX_MAC_CHECK_ENABLED 1 #define TRACE_SUNGEM_RX_MAC_MULTICAST_ENABLED 1 #define TRACE_SUNGEM_RX_MAC_COMPARE_ENABLED 1 #define TRACE_SUNGEM_RX_PACKET_ENABLED 1 #define TRACE_SUNGEM_RX_DISABLED_ENABLED 1 #define TRACE_SUNGEM_RX_BAD_FRAME_SIZE_ENABLED 1 #define TRACE_SUNGEM_RX_UNMATCHED_ENABLED 1 #define TRACE_SUNGEM_RX_PROCESS_ENABLED 1 #define TRACE_SUNGEM_RX_RINGFULL_ENABLED 1 #define TRACE_SUNGEM_RX_DESC_ENABLED 1 #define TRACE_SUNGEM_RX_RESET_ENABLED 1 #define TRACE_SUNGEM_RX_KICK_ENABLED 1 #define TRACE_SUNGEM_RESET_ENABLED 1 #define TRACE_SUNGEM_MII_WRITE_ENABLED 1 #define TRACE_SUNGEM_MII_READ_ENABLED 1 #define TRACE_SUNGEM_MII_INVALID_SOF_ENABLED 1 #define TRACE_SUNGEM_MII_INVALID_OP_ENABLED 1 #define TRACE_SUNGEM_MMIO_GREG_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_GREG_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_TXDMA_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_TXDMA_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_RXDMA_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_RXDMA_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_WOL_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_WOL_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_MAC_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_MAC_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_MIF_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_MIF_READ_ENABLED 1 #define TRACE_SUNGEM_MMIO_PCS_WRITE_ENABLED 1 #define TRACE_SUNGEM_MMIO_PCS_READ_ENABLED 1 #define TRACE_SUNHME_SEB_WRITE_ENABLED 1 #define TRACE_SUNHME_SEB_READ_ENABLED 1 #define TRACE_SUNHME_ETX_WRITE_ENABLED 1 #define TRACE_SUNHME_ETX_READ_ENABLED 1 #define TRACE_SUNHME_ERX_WRITE_ENABLED 1 #define TRACE_SUNHME_ERX_READ_ENABLED 1 #define TRACE_SUNHME_MAC_WRITE_ENABLED 1 #define TRACE_SUNHME_MAC_READ_ENABLED 1 #define TRACE_SUNHME_MII_WRITE_ENABLED 1 #define TRACE_SUNHME_MII_READ_ENABLED 1 #define TRACE_SUNHME_MIF_WRITE_ENABLED 1 #define TRACE_SUNHME_MIF_READ_ENABLED 1 #define TRACE_SUNHME_TX_DESC_ENABLED 1 #define TRACE_SUNHME_TX_XSUM_ADD_ENABLED 1 #define TRACE_SUNHME_TX_XSUM_STUFF_ENABLED 1 #define TRACE_SUNHME_TX_DONE_ENABLED 1 #define TRACE_SUNHME_RX_INCOMING_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_DESTMAC_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_BCAST_MATCH_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_HASH_MATCH_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_REJECT_ENABLED 1 #define TRACE_SUNHME_RX_FILTER_ACCEPT_ENABLED 1 #define TRACE_SUNHME_RX_DESC_ENABLED 1 #define TRACE_SUNHME_RX_XSUM_CALC_ENABLED 1 #define TRACE_SUNHME_RX_NORXD_ENABLED 1 #define TRACE_SUNHME_UPDATE_IRQ_ENABLED 1 #define TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_ENABLED 1 #define TRACE_VIRTIO_NET_ANNOUNCE_TIMER_ENABLED 1 #define TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_ENABLED 1 #define TRACE_VIRTIO_NET_POST_LOAD_DEVICE_ENABLED 1 #define TRACE_VIRTIO_NET_RSS_LOAD_ENABLED 1 #define TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_ENABLED 1 #define TRACE_VIRTIO_NET_RSS_DISABLE_ENABLED 1 #define TRACE_VIRTIO_NET_RSS_ERROR_ENABLED 1 #define TRACE_VIRTIO_NET_RSS_ENABLE_ENABLED 1 #define TRACE_TULIP_REG_WRITE_ENABLED 1 #define TRACE_TULIP_REG_READ_ENABLED 1 #define TRACE_TULIP_RECEIVE_ENABLED 1 #define TRACE_TULIP_DESCRIPTOR_ENABLED 1 #define TRACE_TULIP_RX_STATE_ENABLED 1 #define TRACE_TULIP_TX_STATE_ENABLED 1 #define TRACE_TULIP_IRQ_ENABLED 1 #define TRACE_TULIP_MII_WRITE_ENABLED 1 #define TRACE_TULIP_MII_READ_ENABLED 1 #define TRACE_TULIP_RESET_ENABLED 1 #define TRACE_TULIP_SETUP_FRAME_ENABLED 1 #define TRACE_TULIP_SETUP_FILTER_ENABLED 1 #define TRACE_LASI_82596_MEM_READW_ENABLED 1 #define TRACE_LASI_82596_MEM_WRITEW_ENABLED 1 #define TRACE_I82596_S_RESET_ENABLED 1 #define TRACE_I82596_TRANSMIT_ENABLED 1 #define TRACE_I82596_RECEIVE_ANALYSIS_ENABLED 1 #define TRACE_I82596_RECEIVE_PACKET_ENABLED 1 #define TRACE_I82596_NEW_MAC_ENABLED 1 #define TRACE_I82596_SET_MULTICAST_ENABLED 1 #define TRACE_I82596_CHANNEL_ATTENTION_ENABLED 1 #define TRACE_IMX_PHY_READ_ENABLED 1 #define TRACE_IMX_PHY_READ_NUM_ENABLED 1 #define TRACE_IMX_PHY_WRITE_ENABLED 1 #define TRACE_IMX_PHY_WRITE_NUM_ENABLED 1 #define TRACE_IMX_PHY_UPDATE_LINK_ENABLED 1 #define TRACE_IMX_PHY_RESET_ENABLED 1 #define TRACE_IMX_FEC_READ_BD_ENABLED 1 #define TRACE_IMX_ENET_READ_BD_ENABLED 1 #define TRACE_IMX_ETH_TX_BD_BUSY_ENABLED 1 #define TRACE_IMX_ETH_RX_BD_FULL_ENABLED 1 #define TRACE_IMX_ETH_READ_ENABLED 1 #define TRACE_IMX_ETH_WRITE_ENABLED 1 #define TRACE_IMX_FEC_RECEIVE_ENABLED 1 #define TRACE_IMX_FEC_RECEIVE_LEN_ENABLED 1 #define TRACE_IMX_FEC_RECEIVE_LAST_ENABLED 1 #define TRACE_IMX_ENET_RECEIVE_ENABLED 1 #define TRACE_IMX_ENET_RECEIVE_LEN_ENABLED 1 #define TRACE_IMX_ENET_RECEIVE_LAST_ENABLED 1 #define TRACE_NPCM7XX_EMC_RESET_ENABLED 1 #define TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_ENABLED 1 #define TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_ENABLED 1 #define TRACE_NPCM7XX_EMC_SET_MISTA_ENABLED 1 #define TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_ENABLED 1 #define TRACE_NPCM7XX_EMC_SENT_PACKET_ENABLED 1 #define TRACE_NPCM7XX_EMC_TX_DONE_ENABLED 1 #define TRACE_NPCM7XX_EMC_CAN_RECEIVE_ENABLED 1 #define TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_ENABLED 1 #define TRACE_NPCM7XX_EMC_PACKET_DROPPED_ENABLED 1 #define TRACE_NPCM7XX_EMC_RECEIVING_PACKET_ENABLED 1 #define TRACE_NPCM7XX_EMC_RECEIVED_PACKET_ENABLED 1 #define TRACE_NPCM7XX_EMC_RX_DONE_ENABLED 1 #define TRACE_NPCM7XX_EMC_REG_READ_ENABLED 1 #define TRACE_NPCM7XX_EMC_REG_WRITE_ENABLED 1 #define TRACE_NPCM_GMAC_REG_READ_ENABLED 1 #define TRACE_NPCM_GMAC_REG_WRITE_ENABLED 1 #define TRACE_NPCM_GMAC_MDIO_ACCESS_ENABLED 1 #define TRACE_NPCM_GMAC_RESET_ENABLED 1 #define TRACE_NPCM_GMAC_SET_LINK_ENABLED 1 #define TRACE_NPCM_GMAC_UPDATE_IRQ_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_DESC_READ_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_RECEIVE_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_RECEIVED_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_SENT_ENABLED 1 #define TRACE_NPCM_GMAC_DEBUG_DESC_DATA_ENABLED 1 #define TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_ENABLED 1 #define TRACE_NPCM_GMAC_TX_DESC_OWNER_ENABLED 1 #define TRACE_NPCM_PCS_REG_READ_ENABLED 1 #define TRACE_NPCM_PCS_REG_WRITE_ENABLED 1 #define TRACE_DP8393X_RAISE_IRQ_ENABLED 1 #define TRACE_DP8393X_LOWER_IRQ_ENABLED 1 #define TRACE_DP8393X_LOAD_CAM_ENABLED 1 #define TRACE_DP8393X_LOAD_CAM_DONE_ENABLED 1 #define TRACE_DP8393X_READ_RRA_REGS_ENABLED 1 #define TRACE_DP8393X_TRANSMIT_PACKET_ENABLED 1 #define TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_ENABLED 1 #define TRACE_DP8393X_READ_ENABLED 1 #define TRACE_DP8393X_WRITE_ENABLED 1 #define TRACE_DP8393X_WRITE_INVALID_ENABLED 1 #define TRACE_DP8393X_WRITE_INVALID_DCR_ENABLED 1 #define TRACE_DP8393X_RECEIVE_OVERSIZE_ENABLED 1 #define TRACE_DP8393X_RECEIVE_NOT_NETCARD_ENABLED 1 #define TRACE_DP8393X_RECEIVE_PACKET_ENABLED 1 #define TRACE_DP8393X_RECEIVE_WRITE_STATUS_ENABLED 1 #define TRACE_XEN_NETDEV_REALIZE_ENABLED 1 #define TRACE_XEN_NETDEV_UNREALIZE_ENABLED 1 #define TRACE_XEN_NETDEV_CREATE_ENABLED 1 #define TRACE_XEN_NETDEV_DESTROY_ENABLED 1 #define TRACE_XEN_NETDEV_DISCONNECT_ENABLED 1 #define TRACE_XEN_NETDEV_CONNECT_ENABLED 1 #define TRACE_XEN_NETDEV_FRONTEND_CHANGED_ENABLED 1 #define TRACE_XEN_NETDEV_TX_ENABLED 1 #define TRACE_XEN_NETDEV_RX_ENABLED 1 #include "qemu/log-for-trace.h" #include "qemu/error-report.h" #define TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_mii_write_reg(uint32_t reg, uint32_t value) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_MII_WRITE_REG) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 4 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_mii_write_reg " "MII write: reg=0x%" PRIx32 " value=0x%" PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, value); #line 1324 "trace/trace-hw_net.h" } else { #line 4 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_mii_write_reg " "MII write: reg=0x%" PRIx32 " value=0x%" PRIx32 "\n", reg, value); #line 1328 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_mii_write_reg(uint32_t reg, uint32_t value) { if (true) { _nocheck__trace_allwinner_sun8i_emac_mii_write_reg(reg, value); } } #define TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_mii_read_reg(uint32_t reg, uint32_t value) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_MII_READ_REG) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 5 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_mii_read_reg " "MII read: reg=0x%" PRIx32 " value=0x%" PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, value); #line 1355 "trace/trace-hw_net.h" } else { #line 5 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_mii_read_reg " "MII read: reg=0x%" PRIx32 " value=0x%" PRIx32 "\n", reg, value); #line 1359 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_mii_read_reg(uint32_t reg, uint32_t value) { if (true) { _nocheck__trace_allwinner_sun8i_emac_mii_read_reg(reg, value); } } #define TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_receive(uint32_t desc, uint32_t paddr, uint32_t bytes) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 6 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_receive " "RX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , desc, paddr, bytes); #line 1386 "trace/trace-hw_net.h" } else { #line 6 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_receive " "RX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 "\n", desc, paddr, bytes); #line 1390 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_receive(uint32_t desc, uint32_t paddr, uint32_t bytes) { if (true) { _nocheck__trace_allwinner_sun8i_emac_receive(desc, paddr, bytes); } } #define TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_transmit(uint32_t desc, uint32_t paddr, uint32_t bytes) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_TRANSMIT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 7 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_transmit " "TX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , desc, paddr, bytes); #line 1417 "trace/trace-hw_net.h" } else { #line 7 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_transmit " "TX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 "\n", desc, paddr, bytes); #line 1421 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_transmit(uint32_t desc, uint32_t paddr, uint32_t bytes) { if (true) { _nocheck__trace_allwinner_sun8i_emac_transmit(desc, paddr, bytes); } } #define TRACE_ALLWINNER_SUN8I_EMAC_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_RESET) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_reset(void) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 8 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_reset " "HW reset" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 1448 "trace/trace-hw_net.h" } else { #line 8 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_reset " "HW reset" "\n"); #line 1452 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_reset(void) { if (true) { _nocheck__trace_allwinner_sun8i_emac_reset(); } } #define TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_set_link(bool active) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_SET_LINK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 9 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_set_link " "Set link: active=%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , active); #line 1479 "trace/trace-hw_net.h" } else { #line 9 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_set_link " "Set link: active=%u" "\n", active); #line 1483 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_set_link(bool active) { if (true) { _nocheck__trace_allwinner_sun8i_emac_set_link(active); } } #define TRACE_ALLWINNER_SUN8I_EMAC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_READ) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 10 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_read " "MMIO read: offset=0x%" PRIx64 " value=0x%" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , offset, val); #line 1510 "trace/trace-hw_net.h" } else { #line 10 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_read " "MMIO read: offset=0x%" PRIx64 " value=0x%" PRIx64 "\n", offset, val); #line 1514 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) { if (true) { _nocheck__trace_allwinner_sun8i_emac_read(offset, val); } } #define TRACE_ALLWINNER_SUN8I_EMAC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_ALLWINNER_SUN8I_EMAC_WRITE) || \ false) static inline void _nocheck__trace_allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) { if (trace_event_get_state(TRACE_ALLWINNER_SUN8I_EMAC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 11 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:allwinner_sun8i_emac_write " "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , offset, val); #line 1541 "trace/trace-hw_net.h" } else { #line 11 "../hw/net/trace-events" qemu_log("allwinner_sun8i_emac_write " "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 "\n", offset, val); #line 1545 "trace/trace-hw_net.h" } } } static inline void trace_allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) { if (true) { _nocheck__trace_allwinner_sun8i_emac_write(offset, val); } } #define TRACE_LANCE_MEM_READW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_LANCE_MEM_READW) || \ false) static inline void _nocheck__trace_lance_mem_readw(uint64_t addr, uint32_t ret) { if (trace_event_get_state(TRACE_LANCE_MEM_READW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 14 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:lance_mem_readw " "addr=0x%"PRIx64"val=0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, ret); #line 1572 "trace/trace-hw_net.h" } else { #line 14 "../hw/net/trace-events" qemu_log("lance_mem_readw " "addr=0x%"PRIx64"val=0x%04x" "\n", addr, ret); #line 1576 "trace/trace-hw_net.h" } } } static inline void trace_lance_mem_readw(uint64_t addr, uint32_t ret) { if (true) { _nocheck__trace_lance_mem_readw(addr, ret); } } #define TRACE_LANCE_MEM_WRITEW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_LANCE_MEM_WRITEW) || \ false) static inline void _nocheck__trace_lance_mem_writew(uint64_t addr, uint32_t val) { if (trace_event_get_state(TRACE_LANCE_MEM_WRITEW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 15 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:lance_mem_writew " "addr=0x%"PRIx64"val=0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1603 "trace/trace-hw_net.h" } else { #line 15 "../hw/net/trace-events" qemu_log("lance_mem_writew " "addr=0x%"PRIx64"val=0x%04x" "\n", addr, val); #line 1607 "trace/trace-hw_net.h" } } } static inline void trace_lance_mem_writew(uint64_t addr, uint32_t val) { if (true) { _nocheck__trace_lance_mem_writew(addr, val); } } #define TRACE_MIPSNET_SEND_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_MIPSNET_SEND) || \ false) static inline void _nocheck__trace_mipsnet_send(uint32_t size) { if (trace_event_get_state(TRACE_MIPSNET_SEND) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 18 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:mipsnet_send " "sending len=%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 1634 "trace/trace-hw_net.h" } else { #line 18 "../hw/net/trace-events" qemu_log("mipsnet_send " "sending len=%u" "\n", size); #line 1638 "trace/trace-hw_net.h" } } } static inline void trace_mipsnet_send(uint32_t size) { if (true) { _nocheck__trace_mipsnet_send(size); } } #define TRACE_MIPSNET_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_MIPSNET_RECEIVE) || \ false) static inline void _nocheck__trace_mipsnet_receive(uint32_t size) { if (trace_event_get_state(TRACE_MIPSNET_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 19 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:mipsnet_receive " "receiving len=%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 1665 "trace/trace-hw_net.h" } else { #line 19 "../hw/net/trace-events" qemu_log("mipsnet_receive " "receiving len=%u" "\n", size); #line 1669 "trace/trace-hw_net.h" } } } static inline void trace_mipsnet_receive(uint32_t size) { if (true) { _nocheck__trace_mipsnet_receive(size); } } #define TRACE_MIPSNET_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_MIPSNET_READ) || \ false) static inline void _nocheck__trace_mipsnet_read(uint64_t addr, uint32_t val) { if (trace_event_get_state(TRACE_MIPSNET_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 20 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:mipsnet_read " "read addr=0x%" PRIx64 " val=0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1696 "trace/trace-hw_net.h" } else { #line 20 "../hw/net/trace-events" qemu_log("mipsnet_read " "read addr=0x%" PRIx64 " val=0x%x" "\n", addr, val); #line 1700 "trace/trace-hw_net.h" } } } static inline void trace_mipsnet_read(uint64_t addr, uint32_t val) { if (true) { _nocheck__trace_mipsnet_read(addr, val); } } #define TRACE_MIPSNET_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_MIPSNET_WRITE) || \ false) static inline void _nocheck__trace_mipsnet_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_MIPSNET_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 21 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:mipsnet_write " "write addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1727 "trace/trace-hw_net.h" } else { #line 21 "../hw/net/trace-events" qemu_log("mipsnet_write " "write addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", addr, val); #line 1731 "trace/trace-hw_net.h" } } } static inline void trace_mipsnet_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_mipsnet_write(addr, val); } } #define TRACE_MIPSNET_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_MIPSNET_IRQ) || \ false) static inline void _nocheck__trace_mipsnet_irq(uint32_t isr, uint32_t intctl) { if (trace_event_get_state(TRACE_MIPSNET_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 22 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:mipsnet_irq " "set irq to %d (0x%02x)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , isr, intctl); #line 1758 "trace/trace-hw_net.h" } else { #line 22 "../hw/net/trace-events" qemu_log("mipsnet_irq " "set irq to %d (0x%02x)" "\n", isr, intctl); #line 1762 "trace/trace-hw_net.h" } } } static inline void trace_mipsnet_irq(uint32_t isr, uint32_t intctl) { if (true) { _nocheck__trace_mipsnet_irq(isr, intctl); } } #define TRACE_NE2000_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NE2000_READ) || \ false) static inline void _nocheck__trace_ne2000_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_NE2000_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 25 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:ne2000_read " "read addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1789 "trace/trace-hw_net.h" } else { #line 25 "../hw/net/trace-events" qemu_log("ne2000_read " "read addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", addr, val); #line 1793 "trace/trace-hw_net.h" } } } static inline void trace_ne2000_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_ne2000_read(addr, val); } } #define TRACE_NE2000_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NE2000_WRITE) || \ false) static inline void _nocheck__trace_ne2000_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_NE2000_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 26 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:ne2000_write " "write addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1820 "trace/trace-hw_net.h" } else { #line 26 "../hw/net/trace-events" qemu_log("ne2000_write " "write addr=0x%" PRIx64 " val=0x%" PRIx64 "\n", addr, val); #line 1824 "trace/trace-hw_net.h" } } } static inline void trace_ne2000_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_ne2000_write(addr, val); } } #define TRACE_NE2000_IOPORT_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NE2000_IOPORT_READ) || \ false) static inline void _nocheck__trace_ne2000_ioport_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_NE2000_IOPORT_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 27 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:ne2000_ioport_read " "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1851 "trace/trace-hw_net.h" } else { #line 27 "../hw/net/trace-events" qemu_log("ne2000_ioport_read " "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64 "\n", addr, val); #line 1855 "trace/trace-hw_net.h" } } } static inline void trace_ne2000_ioport_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_ne2000_ioport_read(addr, val); } } #define TRACE_NE2000_IOPORT_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NE2000_IOPORT_WRITE) || \ false) static inline void _nocheck__trace_ne2000_ioport_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_NE2000_IOPORT_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 28 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:ne2000_ioport_write " "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 1882 "trace/trace-hw_net.h" } else { #line 28 "../hw/net/trace-events" qemu_log("ne2000_ioport_write " "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64 "\n", addr, val); #line 1886 "trace/trace-hw_net.h" } } } static inline void trace_ne2000_ioport_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_ne2000_ioport_write(addr, val); } } #define TRACE_OPEN_ETH_MII_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_MII_WRITE) || \ false) static inline void _nocheck__trace_open_eth_mii_write(unsigned idx, uint16_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_MII_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 31 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_mii_write " "MII[0x%02x] <- 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, v); #line 1913 "trace/trace-hw_net.h" } else { #line 31 "../hw/net/trace-events" qemu_log("open_eth_mii_write " "MII[0x%02x] <- 0x%04x" "\n", idx, v); #line 1917 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_mii_write(unsigned idx, uint16_t v) { if (true) { _nocheck__trace_open_eth_mii_write(idx, v); } } #define TRACE_OPEN_ETH_MII_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_MII_READ) || \ false) static inline void _nocheck__trace_open_eth_mii_read(unsigned idx, uint16_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_MII_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 32 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_mii_read " "MII[0x%02x] -> 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, v); #line 1944 "trace/trace-hw_net.h" } else { #line 32 "../hw/net/trace-events" qemu_log("open_eth_mii_read " "MII[0x%02x] -> 0x%04x" "\n", idx, v); #line 1948 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_mii_read(unsigned idx, uint16_t v) { if (true) { _nocheck__trace_open_eth_mii_read(idx, v); } } #define TRACE_OPEN_ETH_UPDATE_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_UPDATE_IRQ) || \ false) static inline void _nocheck__trace_open_eth_update_irq(uint32_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_UPDATE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 33 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_update_irq " "IRQ <- 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , v); #line 1975 "trace/trace-hw_net.h" } else { #line 33 "../hw/net/trace-events" qemu_log("open_eth_update_irq " "IRQ <- 0x%x" "\n", v); #line 1979 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_update_irq(uint32_t v) { if (true) { _nocheck__trace_open_eth_update_irq(v); } } #define TRACE_OPEN_ETH_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_RECEIVE) || \ false) static inline void _nocheck__trace_open_eth_receive(unsigned len) { if (trace_event_get_state(TRACE_OPEN_ETH_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 34 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_receive " "RX: len: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 2006 "trace/trace-hw_net.h" } else { #line 34 "../hw/net/trace-events" qemu_log("open_eth_receive " "RX: len: %u" "\n", len); #line 2010 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_receive(unsigned len) { if (true) { _nocheck__trace_open_eth_receive(len); } } #define TRACE_OPEN_ETH_RECEIVE_MCAST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_RECEIVE_MCAST) || \ false) static inline void _nocheck__trace_open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) { if (trace_event_get_state(TRACE_OPEN_ETH_RECEIVE_MCAST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 35 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_receive_mcast " "MCAST: idx = %u, hash: %08x:%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, h0, h1); #line 2037 "trace/trace-hw_net.h" } else { #line 35 "../hw/net/trace-events" qemu_log("open_eth_receive_mcast " "MCAST: idx = %u, hash: %08x:%08x" "\n", idx, h0, h1); #line 2041 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) { if (true) { _nocheck__trace_open_eth_receive_mcast(idx, h0, h1); } } #define TRACE_OPEN_ETH_RECEIVE_REJECT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_RECEIVE_REJECT) || \ false) static inline void _nocheck__trace_open_eth_receive_reject(void) { if (trace_event_get_state(TRACE_OPEN_ETH_RECEIVE_REJECT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 36 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_receive_reject " "RX: rejected" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2068 "trace/trace-hw_net.h" } else { #line 36 "../hw/net/trace-events" qemu_log("open_eth_receive_reject " "RX: rejected" "\n"); #line 2072 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_receive_reject(void) { if (true) { _nocheck__trace_open_eth_receive_reject(); } } #define TRACE_OPEN_ETH_RECEIVE_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_RECEIVE_DESC) || \ false) static inline void _nocheck__trace_open_eth_receive_desc(uint32_t addr, uint32_t len_flags) { if (trace_event_get_state(TRACE_OPEN_ETH_RECEIVE_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 37 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_receive_desc " "RX: 0x%08x, len_flags: 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, len_flags); #line 2099 "trace/trace-hw_net.h" } else { #line 37 "../hw/net/trace-events" qemu_log("open_eth_receive_desc " "RX: 0x%08x, len_flags: 0x%08x" "\n", addr, len_flags); #line 2103 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_receive_desc(uint32_t addr, uint32_t len_flags) { if (true) { _nocheck__trace_open_eth_receive_desc(addr, len_flags); } } #define TRACE_OPEN_ETH_START_XMIT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_START_XMIT) || \ false) static inline void _nocheck__trace_open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) { if (trace_event_get_state(TRACE_OPEN_ETH_START_XMIT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 38 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_start_xmit " "TX: 0x%08x, len: %u, tx_len: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, len, tx_len); #line 2130 "trace/trace-hw_net.h" } else { #line 38 "../hw/net/trace-events" qemu_log("open_eth_start_xmit " "TX: 0x%08x, len: %u, tx_len: %u" "\n", addr, len, tx_len); #line 2134 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) { if (true) { _nocheck__trace_open_eth_start_xmit(addr, len, tx_len); } } #define TRACE_OPEN_ETH_REG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_REG_READ) || \ false) static inline void _nocheck__trace_open_eth_reg_read(uint32_t addr, uint32_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 39 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_reg_read " "MAC[0x%02x] -> 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, v); #line 2161 "trace/trace-hw_net.h" } else { #line 39 "../hw/net/trace-events" qemu_log("open_eth_reg_read " "MAC[0x%02x] -> 0x%08x" "\n", addr, v); #line 2165 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_reg_read(uint32_t addr, uint32_t v) { if (true) { _nocheck__trace_open_eth_reg_read(addr, v); } } #define TRACE_OPEN_ETH_REG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_REG_WRITE) || \ false) static inline void _nocheck__trace_open_eth_reg_write(uint32_t addr, uint32_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 40 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_reg_write " "MAC[0x%02x] <- 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, v); #line 2192 "trace/trace-hw_net.h" } else { #line 40 "../hw/net/trace-events" qemu_log("open_eth_reg_write " "MAC[0x%02x] <- 0x%08x" "\n", addr, v); #line 2196 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_reg_write(uint32_t addr, uint32_t v) { if (true) { _nocheck__trace_open_eth_reg_write(addr, v); } } #define TRACE_OPEN_ETH_DESC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_DESC_READ) || \ false) static inline void _nocheck__trace_open_eth_desc_read(uint32_t addr, uint32_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_DESC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 41 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_desc_read " "DESC[0x%04x] -> 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, v); #line 2223 "trace/trace-hw_net.h" } else { #line 41 "../hw/net/trace-events" qemu_log("open_eth_desc_read " "DESC[0x%04x] -> 0x%08x" "\n", addr, v); #line 2227 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_desc_read(uint32_t addr, uint32_t v) { if (true) { _nocheck__trace_open_eth_desc_read(addr, v); } } #define TRACE_OPEN_ETH_DESC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_OPEN_ETH_DESC_WRITE) || \ false) static inline void _nocheck__trace_open_eth_desc_write(uint32_t addr, uint32_t v) { if (trace_event_get_state(TRACE_OPEN_ETH_DESC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 42 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:open_eth_desc_write " "DESC[0x%04x] <- 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, v); #line 2254 "trace/trace-hw_net.h" } else { #line 42 "../hw/net/trace-events" qemu_log("open_eth_desc_write " "DESC[0x%04x] <- 0x%08x" "\n", addr, v); #line 2258 "trace/trace-hw_net.h" } } } static inline void trace_open_eth_desc_write(uint32_t addr, uint32_t v) { if (true) { _nocheck__trace_open_eth_desc_write(addr, v); } } #define TRACE_PCNET_S_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_S_RESET) || \ false) static inline void _nocheck__trace_pcnet_s_reset(void * s) { if (trace_event_get_state(TRACE_PCNET_S_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 45 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_s_reset " "s=%p" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 2285 "trace/trace-hw_net.h" } else { #line 45 "../hw/net/trace-events" qemu_log("pcnet_s_reset " "s=%p" "\n", s); #line 2289 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_s_reset(void * s) { if (true) { _nocheck__trace_pcnet_s_reset(s); } } #define TRACE_PCNET_USER_INT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_USER_INT) || \ false) static inline void _nocheck__trace_pcnet_user_int(void * s) { if (trace_event_get_state(TRACE_PCNET_USER_INT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 46 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_user_int " "s=%p" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 2316 "trace/trace-hw_net.h" } else { #line 46 "../hw/net/trace-events" qemu_log("pcnet_user_int " "s=%p" "\n", s); #line 2320 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_user_int(void * s) { if (true) { _nocheck__trace_pcnet_user_int(s); } } #define TRACE_PCNET_ISR_CHANGE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_ISR_CHANGE) || \ false) static inline void _nocheck__trace_pcnet_isr_change(void * s, uint32_t isr, uint32_t isr_old) { if (trace_event_get_state(TRACE_PCNET_ISR_CHANGE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 47 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_isr_change " "s=%p INTA=%d<=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s, isr, isr_old); #line 2347 "trace/trace-hw_net.h" } else { #line 47 "../hw/net/trace-events" qemu_log("pcnet_isr_change " "s=%p INTA=%d<=%d" "\n", s, isr, isr_old); #line 2351 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_isr_change(void * s, uint32_t isr, uint32_t isr_old) { if (true) { _nocheck__trace_pcnet_isr_change(s, isr, isr_old); } } #define TRACE_PCNET_INIT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_INIT) || \ false) static inline void _nocheck__trace_pcnet_init(void * s, uint64_t init_addr) { if (trace_event_get_state(TRACE_PCNET_INIT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 48 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_init " "s=%p init_addr=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s, init_addr); #line 2378 "trace/trace-hw_net.h" } else { #line 48 "../hw/net/trace-events" qemu_log("pcnet_init " "s=%p init_addr=0x%"PRIx64 "\n", s, init_addr); #line 2382 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_init(void * s, uint64_t init_addr) { if (true) { _nocheck__trace_pcnet_init(s, init_addr); } } #define TRACE_PCNET_RLEN_TLEN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_RLEN_TLEN) || \ false) static inline void _nocheck__trace_pcnet_rlen_tlen(void * s, uint32_t rlen, uint32_t tlen) { if (trace_event_get_state(TRACE_PCNET_RLEN_TLEN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 49 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_rlen_tlen " "s=%p rlen=%d tlen=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s, rlen, tlen); #line 2409 "trace/trace-hw_net.h" } else { #line 49 "../hw/net/trace-events" qemu_log("pcnet_rlen_tlen " "s=%p rlen=%d tlen=%d" "\n", s, rlen, tlen); #line 2413 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_rlen_tlen(void * s, uint32_t rlen, uint32_t tlen) { if (true) { _nocheck__trace_pcnet_rlen_tlen(s, rlen, tlen); } } #define TRACE_PCNET_SS32_RDRA_TDRA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_SS32_RDRA_TDRA) || \ false) static inline void _nocheck__trace_pcnet_ss32_rdra_tdra(void * s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) { if (trace_event_get_state(TRACE_PCNET_SS32_RDRA_TDRA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 50 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_ss32_rdra_tdra " "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s, ss32, rdra, rcvrl, tdra, xmtrl); #line 2440 "trace/trace-hw_net.h" } else { #line 50 "../hw/net/trace-events" qemu_log("pcnet_ss32_rdra_tdra " "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]" "\n", s, ss32, rdra, rcvrl, tdra, xmtrl); #line 2444 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_ss32_rdra_tdra(void * s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) { if (true) { _nocheck__trace_pcnet_ss32_rdra_tdra(s, ss32, rdra, rcvrl, tdra, xmtrl); } } #define TRACE_PCNET_APROM_WRITEB_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_APROM_WRITEB) || \ false) static inline void _nocheck__trace_pcnet_aprom_writeb(void * opaque, uint32_t addr, uint32_t val) { if (trace_event_get_state(TRACE_PCNET_APROM_WRITEB) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 53 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_aprom_writeb " "opaque=%p addr=0x%08x val=0x%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , opaque, addr, val); #line 2471 "trace/trace-hw_net.h" } else { #line 53 "../hw/net/trace-events" qemu_log("pcnet_aprom_writeb " "opaque=%p addr=0x%08x val=0x%02x" "\n", opaque, addr, val); #line 2475 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_aprom_writeb(void * opaque, uint32_t addr, uint32_t val) { if (true) { _nocheck__trace_pcnet_aprom_writeb(opaque, addr, val); } } #define TRACE_PCNET_APROM_READB_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_APROM_READB) || \ false) static inline void _nocheck__trace_pcnet_aprom_readb(void * opaque, uint32_t addr, uint32_t val) { if (trace_event_get_state(TRACE_PCNET_APROM_READB) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 54 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_aprom_readb " "opaque=%p addr=0x%08x val=0x%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , opaque, addr, val); #line 2502 "trace/trace-hw_net.h" } else { #line 54 "../hw/net/trace-events" qemu_log("pcnet_aprom_readb " "opaque=%p addr=0x%08x val=0x%02x" "\n", opaque, addr, val); #line 2506 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_aprom_readb(void * opaque, uint32_t addr, uint32_t val) { if (true) { _nocheck__trace_pcnet_aprom_readb(opaque, addr, val); } } #define TRACE_PCNET_IOPORT_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_IOPORT_READ) || \ false) static inline void _nocheck__trace_pcnet_ioport_read(void * opaque, uint64_t addr, unsigned size) { if (trace_event_get_state(TRACE_PCNET_IOPORT_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 55 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_ioport_read " "opaque=%p addr=0x%"PRIx64" size=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , opaque, addr, size); #line 2533 "trace/trace-hw_net.h" } else { #line 55 "../hw/net/trace-events" qemu_log("pcnet_ioport_read " "opaque=%p addr=0x%"PRIx64" size=%d" "\n", opaque, addr, size); #line 2537 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_ioport_read(void * opaque, uint64_t addr, unsigned size) { if (true) { _nocheck__trace_pcnet_ioport_read(opaque, addr, size); } } #define TRACE_PCNET_IOPORT_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_PCNET_IOPORT_WRITE) || \ false) static inline void _nocheck__trace_pcnet_ioport_write(void * opaque, uint64_t addr, uint64_t data, unsigned size) { if (trace_event_get_state(TRACE_PCNET_IOPORT_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 56 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:pcnet_ioport_write " "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , opaque, addr, data, size); #line 2564 "trace/trace-hw_net.h" } else { #line 56 "../hw/net/trace-events" qemu_log("pcnet_ioport_write " "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d" "\n", opaque, addr, data, size); #line 2568 "trace/trace-hw_net.h" } } } static inline void trace_pcnet_ioport_write(void * opaque, uint64_t addr, uint64_t data, unsigned size) { if (true) { _nocheck__trace_pcnet_ioport_write(opaque, addr, data, size); } } #define TRACE_NET_RX_PKT_PARSED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_PARSED) || \ false) static inline void _nocheck__trace_net_rx_pkt_parsed(bool ip4, bool ip6, int l4proto, size_t l3o, size_t l4o, size_t l5o) { if (trace_event_get_state(TRACE_NET_RX_PKT_PARSED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 59 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_parsed " "RX packet parsed: ip4: %d, ip6: %d, l4 protocol: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ip4, ip6, l4proto, l3o, l4o, l5o); #line 2595 "trace/trace-hw_net.h" } else { #line 59 "../hw/net/trace-events" qemu_log("net_rx_pkt_parsed " "RX packet parsed: ip4: %d, ip6: %d, l4 protocol: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu" "\n", ip4, ip6, l4proto, l3o, l4o, l5o); #line 2599 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_parsed(bool ip4, bool ip6, int l4proto, size_t l3o, size_t l4o, size_t l5o) { if (true) { _nocheck__trace_net_rx_pkt_parsed(ip4, ip6, l4proto, l3o, l4o, l5o); } } #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_validate_entry(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_ENTRY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 60 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_validate_entry " "Starting L4 checksum validation" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2626 "trace/trace-hw_net.h" } else { #line 60 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_validate_entry " "Starting L4 checksum validation" "\n"); #line 2630 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_validate_entry(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_validate_entry(); } } #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_validate_not_xxp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_NOT_XXP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 61 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_validate_not_xxp " "Not a TCP/UDP packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2657 "trace/trace-hw_net.h" } else { #line 61 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_validate_not_xxp " "Not a TCP/UDP packet" "\n"); #line 2661 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_validate_not_xxp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_validate_not_xxp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_UDP_WITH_NO_CHECKSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 62 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_validate_udp_with_no_checksum " "UDP packet without checksum" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2688 "trace/trace-hw_net.h" } else { #line 62 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_validate_udp_with_no_checksum " "UDP packet without checksum" "\n"); #line 2692 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_validate_udp_with_no_checksum(); } } #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_validate_ip4_fragment(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_IP4_FRAGMENT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 63 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_validate_ip4_fragment " "IP4 fragment" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2719 "trace/trace-hw_net.h" } else { #line 63 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_validate_ip4_fragment " "IP4 fragment" "\n"); #line 2723 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_validate_ip4_fragment(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_validate_ip4_fragment(); } } #define TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_validate_csum(bool csum_valid) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_VALIDATE_CSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 64 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_validate_csum " "Checksum valid: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , csum_valid); #line 2750 "trace/trace-hw_net.h" } else { #line 64 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_validate_csum " "Checksum valid: %d" "\n", csum_valid); #line 2754 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_validate_csum(bool csum_valid) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_validate_csum(csum_valid); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_entry(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_ENTRY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 66 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_entry " "Starting L4 checksum calculation" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2781 "trace/trace-hw_net.h" } else { #line 66 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_entry " "Starting L4 checksum calculation" "\n"); #line 2785 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_entry(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_entry(); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_ip4_udp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 67 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_ip4_udp " "IP4/UDP packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2812 "trace/trace-hw_net.h" } else { #line 67 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_ip4_udp " "IP4/UDP packet" "\n"); #line 2816 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_ip4_udp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_ip4_udp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_ip4_tcp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP4_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 68 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_ip4_tcp " "IP4/TCP packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2843 "trace/trace-hw_net.h" } else { #line 68 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_ip4_tcp " "IP4/TCP packet" "\n"); #line 2847 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_ip4_tcp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_ip4_tcp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_ip6_udp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 69 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_ip6_udp " "IP6/UDP packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2874 "trace/trace-hw_net.h" } else { #line 69 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_ip6_udp " "IP6/UDP packet" "\n"); #line 2878 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_ip6_udp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_ip6_udp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_ip6_tcp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_IP6_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 70 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_ip6_tcp " "IP6/TCP packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2905 "trace/trace-hw_net.h" } else { #line 70 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_ip6_tcp " "IP6/TCP packet" "\n"); #line 2909 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_ip6_tcp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_ip6_tcp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_PH_CSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 71 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_ph_csum " "Pseudo-header: checksum counter %u, length %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cntr, csl); #line 2936 "trace/trace-hw_net.h" } else { #line 71 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_ph_csum " "Pseudo-header: checksum counter %u, length %u" "\n", cntr, csl); #line 2940 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_ph_csum(cntr, csl); } } #define TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_CALC_CSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 72 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_calc_csum " "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , l4hdr_off, csl, cntr, csum); #line 2967 "trace/trace-hw_net.h" } else { #line 72 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_calc_csum " "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X" "\n", l4hdr_off, csl, cntr, csum); #line 2971 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_calc_csum(l4hdr_off, csl, cntr, csum); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_entry(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_ENTRY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 74 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_entry " "Starting L4 checksum correction" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 2998 "trace/trace-hw_net.h" } else { #line 74 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_entry " "Starting L4 checksum correction" "\n"); #line 3002 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_entry(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_entry(); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 75 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_tcp " "TCP packet, L4 cso: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , l4_cso); #line 3029 "trace/trace-hw_net.h" } else { #line 75 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_tcp " "TCP packet, L4 cso: %u" "\n", l4_cso); #line 3033 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_tcp(l4_cso); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 76 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_udp " "UDP packet, L4 cso: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , l4_cso); #line 3060 "trace/trace-hw_net.h" } else { #line 76 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_udp " "UDP packet, L4 cso: %u" "\n", l4_cso); #line 3064 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_udp(l4_cso); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_not_xxp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_NOT_XXP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 77 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_not_xxp " "Not an IP4 packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3091 "trace/trace-hw_net.h" } else { #line 77 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_not_xxp " "Not an IP4 packet" "\n"); #line 3095 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_not_xxp(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_not_xxp(); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_ip4_fragment(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_IP4_FRAGMENT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 78 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_ip4_fragment " "IP4 fragment" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3122 "trace/trace-hw_net.h" } else { #line 78 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_ip4_fragment " "IP4 fragment" "\n"); #line 3126 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_ip4_fragment(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_ip4_fragment(); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_UDP_WITH_NO_CHECKSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 79 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_udp_with_no_checksum " "UDP packet without checksum" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3153 "trace/trace-hw_net.h" } else { #line 79 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_udp_with_no_checksum " "UDP packet without checksum" "\n"); #line 3157 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_udp_with_no_checksum(); } } #define TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) { if (trace_event_get_state(TRACE_NET_RX_PKT_L4_CSUM_FIX_CSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 80 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l4_csum_fix_csum " "L4 Checksum: Offset: %u, value 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cso, csum); #line 3184 "trace/trace-hw_net.h" } else { #line 80 "../hw/net/trace-events" qemu_log("net_rx_pkt_l4_csum_fix_csum " "L4 Checksum: Offset: %u, value 0x%X" "\n", cso, csum); #line 3188 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) { if (true) { _nocheck__trace_net_rx_pkt_l4_csum_fix_csum(cso, csum); } } #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY) || \ false) static inline void _nocheck__trace_net_rx_pkt_l3_csum_validate_entry(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_ENTRY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 82 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l3_csum_validate_entry " "Starting L3 checksum validation" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3215 "trace/trace-hw_net.h" } else { #line 82 "../hw/net/trace-events" qemu_log("net_rx_pkt_l3_csum_validate_entry " "Starting L3 checksum validation" "\n"); #line 3219 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l3_csum_validate_entry(void) { if (true) { _nocheck__trace_net_rx_pkt_l3_csum_validate_entry(); } } #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4) || \ false) static inline void _nocheck__trace_net_rx_pkt_l3_csum_validate_not_ip4(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_NOT_IP4) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 83 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l3_csum_validate_not_ip4 " "Not an IP4 packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3246 "trace/trace-hw_net.h" } else { #line 83 "../hw/net/trace-events" qemu_log("net_rx_pkt_l3_csum_validate_not_ip4 " "Not an IP4 packet" "\n"); #line 3250 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l3_csum_validate_not_ip4(void) { if (true) { _nocheck__trace_net_rx_pkt_l3_csum_validate_not_ip4(); } } #define TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM) || \ false) static inline void _nocheck__trace_net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) { if (trace_event_get_state(TRACE_NET_RX_PKT_L3_CSUM_VALIDATE_CSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 84 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_l3_csum_validate_csum " "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , l3hdr_off, csl, cntr, csum, csum_valid); #line 3277 "trace/trace-hw_net.h" } else { #line 84 "../hw/net/trace-events" qemu_log("net_rx_pkt_l3_csum_validate_csum " "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d" "\n", l3hdr_off, csl, cntr, csum, csum_valid); #line 3281 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) { if (true) { _nocheck__trace_net_rx_pkt_l3_csum_validate_csum(l3hdr_off, csl, cntr, csum, csum_valid); } } #define TRACE_NET_RX_PKT_RSS_IP4_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP4) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip4(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP4) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 86 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip4 " "Calculating IPv4 RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3308 "trace/trace-hw_net.h" } else { #line 86 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip4 " "Calculating IPv4 RSS hash" "\n"); #line 3312 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip4(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip4(); } } #define TRACE_NET_RX_PKT_RSS_IP4_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP4_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip4_tcp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP4_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 87 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip4_tcp " "Calculating IPv4/TCP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3339 "trace/trace-hw_net.h" } else { #line 87 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip4_tcp " "Calculating IPv4/TCP RSS hash" "\n"); #line 3343 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip4_tcp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip4_tcp(); } } #define TRACE_NET_RX_PKT_RSS_IP4_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP4_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip4_udp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP4_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 88 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip4_udp " "Calculating IPv4/UDP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3370 "trace/trace-hw_net.h" } else { #line 88 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip4_udp " "Calculating IPv4/UDP RSS hash" "\n"); #line 3374 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip4_udp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip4_udp(); } } #define TRACE_NET_RX_PKT_RSS_IP6_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6_tcp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 89 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6_tcp " "Calculating IPv6/TCP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3401 "trace/trace-hw_net.h" } else { #line 89 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6_tcp " "Calculating IPv6/TCP RSS hash" "\n"); #line 3405 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6_tcp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6_tcp(); } } #define TRACE_NET_RX_PKT_RSS_IP6_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6_udp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 90 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6_udp " "Calculating IPv6/UDP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3432 "trace/trace-hw_net.h" } else { #line 90 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6_udp " "Calculating IPv6/UDP RSS hash" "\n"); #line 3436 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6_udp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6_udp(); } } #define TRACE_NET_RX_PKT_RSS_IP6_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 91 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6 " "Calculating IPv6 RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3463 "trace/trace-hw_net.h" } else { #line 91 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6 " "Calculating IPv6 RSS hash" "\n"); #line 3467 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6(); } } #define TRACE_NET_RX_PKT_RSS_IP6_EX_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6_EX) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6_ex(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6_EX) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 92 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6_ex " "Calculating IPv6/EX RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3494 "trace/trace-hw_net.h" } else { #line 92 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6_ex " "Calculating IPv6/EX RSS hash" "\n"); #line 3498 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6_ex(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6_ex(); } } #define TRACE_NET_RX_PKT_RSS_IP6_EX_TCP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6_EX_TCP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6_ex_tcp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6_EX_TCP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 93 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6_ex_tcp " "Calculating IPv6/EX/TCP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3525 "trace/trace-hw_net.h" } else { #line 93 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6_ex_tcp " "Calculating IPv6/EX/TCP RSS hash" "\n"); #line 3529 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6_ex_tcp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6_ex_tcp(); } } #define TRACE_NET_RX_PKT_RSS_IP6_EX_UDP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_IP6_EX_UDP) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_ip6_ex_udp(void) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_IP6_EX_UDP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 94 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_ip6_ex_udp " "Calculating IPv6/EX/UDP RSS hash" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 3556 "trace/trace-hw_net.h" } else { #line 94 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_ip6_ex_udp " "Calculating IPv6/EX/UDP RSS hash" "\n"); #line 3560 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_ip6_ex_udp(void) { if (true) { _nocheck__trace_net_rx_pkt_rss_ip6_ex_udp(); } } #define TRACE_NET_RX_PKT_RSS_HASH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_HASH) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_HASH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 95 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_hash " "RSS hash for %zu bytes: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rss_length, rss_hash); #line 3587 "trace/trace-hw_net.h" } else { #line 95 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_hash " "RSS hash for %zu bytes: 0x%X" "\n", rss_length, rss_hash); #line 3591 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) { if (true) { _nocheck__trace_net_rx_pkt_rss_hash(rss_length, rss_hash); } } #define TRACE_NET_RX_PKT_RSS_ADD_CHUNK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NET_RX_PKT_RSS_ADD_CHUNK) || \ false) static inline void _nocheck__trace_net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) { if (trace_event_get_state(TRACE_NET_RX_PKT_RSS_ADD_CHUNK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 96 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:net_rx_pkt_rss_add_chunk " "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ptr, size, input_offset); #line 3618 "trace/trace-hw_net.h" } else { #line 96 "../hw/net/trace-events" qemu_log("net_rx_pkt_rss_add_chunk " "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes" "\n", ptr, size, input_offset); #line 3622 "trace/trace-hw_net.h" } } } static inline void trace_net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) { if (true) { _nocheck__trace_net_rx_pkt_rss_add_chunk(ptr, size, input_offset); } } #define TRACE_E1000_RECEIVER_OVERRUN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000_RECEIVER_OVERRUN) || \ false) static inline void _nocheck__trace_e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) { if (trace_event_get_state(TRACE_E1000_RECEIVER_OVERRUN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 99 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000_receiver_overrun " "Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s, rdh, rdt); #line 3649 "trace/trace-hw_net.h" } else { #line 99 "../hw/net/trace-events" qemu_log("e1000_receiver_overrun " "Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u" "\n", s, rdh, rdt); #line 3653 "trace/trace-hw_net.h" } } } static inline void trace_e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) { if (true) { _nocheck__trace_e1000_receiver_overrun(s, rdh, rdt); } } #define TRACE_E1000X_RX_CAN_RECV_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_CAN_RECV_DISABLED) || \ false) static inline void _nocheck__trace_e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) { if (trace_event_get_state(TRACE_E1000X_RX_CAN_RECV_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 102 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_can_recv_disabled " "link_up: %d, rx_enabled %d, pci_master %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , link_up, rx_enabled, pci_master); #line 3680 "trace/trace-hw_net.h" } else { #line 102 "../hw/net/trace-events" qemu_log("e1000x_rx_can_recv_disabled " "link_up: %d, rx_enabled %d, pci_master %d" "\n", link_up, rx_enabled, pci_master); #line 3684 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) { if (true) { _nocheck__trace_e1000x_rx_can_recv_disabled(link_up, rx_enabled, pci_master); } } #define TRACE_E1000X_VLAN_IS_VLAN_PKT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_VLAN_IS_VLAN_PKT) || \ false) static inline void _nocheck__trace_e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) { if (trace_event_get_state(TRACE_E1000X_VLAN_IS_VLAN_PKT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 103 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_vlan_is_vlan_pkt " "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , is_vlan_pkt, eth_proto, vet); #line 3711 "trace/trace-hw_net.h" } else { #line 103 "../hw/net/trace-events" qemu_log("e1000x_vlan_is_vlan_pkt " "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X" "\n", is_vlan_pkt, eth_proto, vet); #line 3715 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) { if (true) { _nocheck__trace_e1000x_vlan_is_vlan_pkt(is_vlan_pkt, eth_proto, vet); } } #define TRACE_E1000X_RX_FLT_VLAN_MISMATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_FLT_VLAN_MISMATCH) || \ false) static inline void _nocheck__trace_e1000x_rx_flt_vlan_mismatch(uint16_t vid) { if (trace_event_get_state(TRACE_E1000X_RX_FLT_VLAN_MISMATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 104 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_flt_vlan_mismatch " "VID mismatch: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vid); #line 3742 "trace/trace-hw_net.h" } else { #line 104 "../hw/net/trace-events" qemu_log("e1000x_rx_flt_vlan_mismatch " "VID mismatch: 0x%X" "\n", vid); #line 3746 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_flt_vlan_mismatch(uint16_t vid) { if (true) { _nocheck__trace_e1000x_rx_flt_vlan_mismatch(vid); } } #define TRACE_E1000X_RX_FLT_VLAN_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_FLT_VLAN_MATCH) || \ false) static inline void _nocheck__trace_e1000x_rx_flt_vlan_match(uint16_t vid) { if (trace_event_get_state(TRACE_E1000X_RX_FLT_VLAN_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 105 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_flt_vlan_match " "VID match: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vid); #line 3773 "trace/trace-hw_net.h" } else { #line 105 "../hw/net/trace-events" qemu_log("e1000x_rx_flt_vlan_match " "VID match: 0x%X" "\n", vid); #line 3777 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_flt_vlan_match(uint16_t vid) { if (true) { _nocheck__trace_e1000x_rx_flt_vlan_match(vid); } } #define TRACE_E1000X_RX_FLT_UCAST_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_FLT_UCAST_MATCH) || \ false) static inline void _nocheck__trace_e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_E1000X_RX_FLT_UCAST_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 106 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_flt_ucast_match " "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, b0, b1, b2, b3, b4, b5); #line 3804 "trace/trace-hw_net.h" } else { #line 106 "../hw/net/trace-events" qemu_log("e1000x_rx_flt_ucast_match " "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x" "\n", idx, b0, b1, b2, b3, b4, b5); #line 3808 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_e1000x_rx_flt_ucast_match(idx, b0, b1, b2, b3, b4, b5); } } #define TRACE_E1000X_RX_FLT_UCAST_MISMATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_FLT_UCAST_MISMATCH) || \ false) static inline void _nocheck__trace_e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_E1000X_RX_FLT_UCAST_MISMATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 107 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_flt_ucast_mismatch " "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5); #line 3835 "trace/trace-hw_net.h" } else { #line 107 "../hw/net/trace-events" qemu_log("e1000x_rx_flt_ucast_mismatch " "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x" "\n", b0, b1, b2, b3, b4, b5); #line 3839 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_e1000x_rx_flt_ucast_mismatch(b0, b1, b2, b3, b4, b5); } } #define TRACE_E1000X_RX_FLT_INEXACT_MISMATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_FLT_INEXACT_MISMATCH) || \ false) static inline void _nocheck__trace_e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) { if (trace_event_get_state(TRACE_E1000X_RX_FLT_INEXACT_MISMATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 108 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_flt_inexact_mismatch " "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5, mo, mta, mta_val); #line 3866 "trace/trace-hw_net.h" } else { #line 108 "../hw/net/trace-events" qemu_log("e1000x_rx_flt_inexact_mismatch " "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] 0x%x" "\n", b0, b1, b2, b3, b4, b5, mo, mta, mta_val); #line 3870 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) { if (true) { _nocheck__trace_e1000x_rx_flt_inexact_mismatch(b0, b1, b2, b3, b4, b5, mo, mta, mta_val); } } #define TRACE_E1000X_RX_LINK_DOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_LINK_DOWN) || \ false) static inline void _nocheck__trace_e1000x_rx_link_down(uint32_t status_reg) { if (trace_event_get_state(TRACE_E1000X_RX_LINK_DOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 109 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_link_down " "Received packet dropped because the link is down STATUS = %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , status_reg); #line 3897 "trace/trace-hw_net.h" } else { #line 109 "../hw/net/trace-events" qemu_log("e1000x_rx_link_down " "Received packet dropped because the link is down STATUS = %u" "\n", status_reg); #line 3901 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_link_down(uint32_t status_reg) { if (true) { _nocheck__trace_e1000x_rx_link_down(status_reg); } } #define TRACE_E1000X_RX_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_DISABLED) || \ false) static inline void _nocheck__trace_e1000x_rx_disabled(uint32_t rctl_reg) { if (trace_event_get_state(TRACE_E1000X_RX_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 110 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_disabled " "Received packet dropped because receive is disabled RCTL = %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rctl_reg); #line 3928 "trace/trace-hw_net.h" } else { #line 110 "../hw/net/trace-events" qemu_log("e1000x_rx_disabled " "Received packet dropped because receive is disabled RCTL = %u" "\n", rctl_reg); #line 3932 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_disabled(uint32_t rctl_reg) { if (true) { _nocheck__trace_e1000x_rx_disabled(rctl_reg); } } #define TRACE_E1000X_RX_OVERSIZED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_RX_OVERSIZED) || \ false) static inline void _nocheck__trace_e1000x_rx_oversized(size_t size) { if (trace_event_get_state(TRACE_E1000X_RX_OVERSIZED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 111 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_rx_oversized " "Received packet dropped because it was oversized (%zu bytes)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 3959 "trace/trace-hw_net.h" } else { #line 111 "../hw/net/trace-events" qemu_log("e1000x_rx_oversized " "Received packet dropped because it was oversized (%zu bytes)" "\n", size); #line 3963 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_rx_oversized(size_t size) { if (true) { _nocheck__trace_e1000x_rx_oversized(size); } } #define TRACE_E1000X_MAC_INDICATE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_MAC_INDICATE) || \ false) static inline void _nocheck__trace_e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_E1000X_MAC_INDICATE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 112 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_mac_indicate " "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5); #line 3990 "trace/trace-hw_net.h" } else { #line 112 "../hw/net/trace-events" qemu_log("e1000x_mac_indicate " "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x" "\n", b0, b1, b2, b3, b4, b5); #line 3994 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_e1000x_mac_indicate(b0, b1, b2, b3, b4, b5); } } #define TRACE_E1000X_LINK_NEGOTIATION_START_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_LINK_NEGOTIATION_START) || \ false) static inline void _nocheck__trace_e1000x_link_negotiation_start(void) { if (trace_event_get_state(TRACE_E1000X_LINK_NEGOTIATION_START) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 113 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_link_negotiation_start " "Start link auto negotiation" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4021 "trace/trace-hw_net.h" } else { #line 113 "../hw/net/trace-events" qemu_log("e1000x_link_negotiation_start " "Start link auto negotiation" "\n"); #line 4025 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_link_negotiation_start(void) { if (true) { _nocheck__trace_e1000x_link_negotiation_start(); } } #define TRACE_E1000X_LINK_NEGOTIATION_DONE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000X_LINK_NEGOTIATION_DONE) || \ false) static inline void _nocheck__trace_e1000x_link_negotiation_done(void) { if (trace_event_get_state(TRACE_E1000X_LINK_NEGOTIATION_DONE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 114 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000x_link_negotiation_done " "Auto negotiation is completed" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4052 "trace/trace-hw_net.h" } else { #line 114 "../hw/net/trace-events" qemu_log("e1000x_link_negotiation_done " "Auto negotiation is completed" "\n"); #line 4056 "trace/trace-hw_net.h" } } } static inline void trace_e1000x_link_negotiation_done(void) { if (true) { _nocheck__trace_e1000x_link_negotiation_done(); } } #define TRACE_E1000E_CORE_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_WRITE) || \ false) static inline void _nocheck__trace_e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_CORE_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 117 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_write " "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, size, val); #line 4083 "trace/trace-hw_net.h" } else { #line 117 "../hw/net/trace-events" qemu_log("e1000e_core_write " "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", index, size, val); #line 4087 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) { if (true) { _nocheck__trace_e1000e_core_write(index, size, val); } } #define TRACE_E1000E_CORE_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_READ) || \ false) static inline void _nocheck__trace_e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_CORE_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 118 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_read " "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, size, val); #line 4114 "trace/trace-hw_net.h" } else { #line 118 "../hw/net/trace-events" qemu_log("e1000e_core_read " "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", index, size, val); #line 4118 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) { if (true) { _nocheck__trace_e1000e_core_read(index, size, val); } } #define TRACE_E1000E_CORE_MDIC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_MDIC_READ) || \ false) static inline void _nocheck__trace_e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) { if (trace_event_get_state(TRACE_E1000E_CORE_MDIC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 119 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_mdic_read " "MDIC READ: PHY[%u][%u] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , page, addr, data); #line 4145 "trace/trace-hw_net.h" } else { #line 119 "../hw/net/trace-events" qemu_log("e1000e_core_mdic_read " "MDIC READ: PHY[%u][%u] = 0x%x" "\n", page, addr, data); #line 4149 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) { if (true) { _nocheck__trace_e1000e_core_mdic_read(page, addr, data); } } #define TRACE_E1000E_CORE_MDIC_READ_UNHANDLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_MDIC_READ_UNHANDLED) || \ false) static inline void _nocheck__trace_e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) { if (trace_event_get_state(TRACE_E1000E_CORE_MDIC_READ_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 120 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_mdic_read_unhandled " "MDIC READ: PHY[%u][%u] UNHANDLED" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , page, addr); #line 4176 "trace/trace-hw_net.h" } else { #line 120 "../hw/net/trace-events" qemu_log("e1000e_core_mdic_read_unhandled " "MDIC READ: PHY[%u][%u] UNHANDLED" "\n", page, addr); #line 4180 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) { if (true) { _nocheck__trace_e1000e_core_mdic_read_unhandled(page, addr); } } #define TRACE_E1000E_CORE_MDIC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_MDIC_WRITE) || \ false) static inline void _nocheck__trace_e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) { if (trace_event_get_state(TRACE_E1000E_CORE_MDIC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 121 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_mdic_write " "MDIC WRITE: PHY[%u][%u] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , page, addr, data); #line 4207 "trace/trace-hw_net.h" } else { #line 121 "../hw/net/trace-events" qemu_log("e1000e_core_mdic_write " "MDIC WRITE: PHY[%u][%u] = 0x%x" "\n", page, addr, data); #line 4211 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) { if (true) { _nocheck__trace_e1000e_core_mdic_write(page, addr, data); } } #define TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED) || \ false) static inline void _nocheck__trace_e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) { if (trace_event_get_state(TRACE_E1000E_CORE_MDIC_WRITE_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 122 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_mdic_write_unhandled " "MDIC WRITE: PHY[%u][%u] UNHANDLED" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , page, addr); #line 4238 "trace/trace-hw_net.h" } else { #line 122 "../hw/net/trace-events" qemu_log("e1000e_core_mdic_write_unhandled " "MDIC WRITE: PHY[%u][%u] UNHANDLED" "\n", page, addr); #line 4242 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) { if (true) { _nocheck__trace_e1000e_core_mdic_write_unhandled(page, addr); } } #define TRACE_E1000E_CORE_CTRL_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_CTRL_WRITE) || \ false) static inline void _nocheck__trace_e1000e_core_ctrl_write(uint64_t index, uint32_t val) { if (trace_event_get_state(TRACE_E1000E_CORE_CTRL_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 123 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_ctrl_write " "Write CTRL register 0x%"PRIx64", value: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, val); #line 4269 "trace/trace-hw_net.h" } else { #line 123 "../hw/net/trace-events" qemu_log("e1000e_core_ctrl_write " "Write CTRL register 0x%"PRIx64", value: 0x%X" "\n", index, val); #line 4273 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_ctrl_write(uint64_t index, uint32_t val) { if (true) { _nocheck__trace_e1000e_core_ctrl_write(index, val); } } #define TRACE_E1000E_CORE_CTRL_SW_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_CTRL_SW_RESET) || \ false) static inline void _nocheck__trace_e1000e_core_ctrl_sw_reset(void) { if (trace_event_get_state(TRACE_E1000E_CORE_CTRL_SW_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 124 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_ctrl_sw_reset " "Doing SW reset" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4300 "trace/trace-hw_net.h" } else { #line 124 "../hw/net/trace-events" qemu_log("e1000e_core_ctrl_sw_reset " "Doing SW reset" "\n"); #line 4304 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_ctrl_sw_reset(void) { if (true) { _nocheck__trace_e1000e_core_ctrl_sw_reset(); } } #define TRACE_E1000E_CORE_CTRL_PHY_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CORE_CTRL_PHY_RESET) || \ false) static inline void _nocheck__trace_e1000e_core_ctrl_phy_reset(void) { if (trace_event_get_state(TRACE_E1000E_CORE_CTRL_PHY_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 125 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_core_ctrl_phy_reset " "Doing PHY reset" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4331 "trace/trace-hw_net.h" } else { #line 125 "../hw/net/trace-events" qemu_log("e1000e_core_ctrl_phy_reset " "Doing PHY reset" "\n"); #line 4335 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_core_ctrl_phy_reset(void) { if (true) { _nocheck__trace_e1000e_core_ctrl_phy_reset(); } } #define TRACE_E1000E_LINK_AUTONEG_FLOWCTL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_AUTONEG_FLOWCTL) || \ false) static inline void _nocheck__trace_e1000e_link_autoneg_flowctl(bool enabled) { if (trace_event_get_state(TRACE_E1000E_LINK_AUTONEG_FLOWCTL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 127 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_autoneg_flowctl " "Auto-negotiated flow control state is %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , enabled); #line 4362 "trace/trace-hw_net.h" } else { #line 127 "../hw/net/trace-events" qemu_log("e1000e_link_autoneg_flowctl " "Auto-negotiated flow control state is %d" "\n", enabled); #line 4366 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_autoneg_flowctl(bool enabled) { if (true) { _nocheck__trace_e1000e_link_autoneg_flowctl(enabled); } } #define TRACE_E1000E_LINK_SET_PARAMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_SET_PARAMS) || \ false) static inline void _nocheck__trace_e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) { if (trace_event_get_state(TRACE_E1000E_LINK_SET_PARAMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 128 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_set_params " "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); #line 4393 "trace/trace-hw_net.h" } else { #line 128 "../hw/net/trace-events" qemu_log("e1000e_link_set_params " "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" "\n", autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); #line 4397 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) { if (true) { _nocheck__trace_e1000e_link_set_params(autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); } } #define TRACE_E1000E_LINK_READ_PARAMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_READ_PARAMS) || \ false) static inline void _nocheck__trace_e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) { if (trace_event_get_state(TRACE_E1000E_LINK_READ_PARAMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 129 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_read_params " "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); #line 4424 "trace/trace-hw_net.h" } else { #line 129 "../hw/net/trace-events" qemu_log("e1000e_link_read_params " "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" "\n", autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); #line 4428 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) { if (true) { _nocheck__trace_e1000e_link_read_params(autodetect, speed, force_spd, force_dplx, rx_fctl, tx_fctl); } } #define TRACE_E1000E_LINK_SET_EXT_PARAMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_SET_EXT_PARAMS) || \ false) static inline void _nocheck__trace_e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) { if (trace_event_get_state(TRACE_E1000E_LINK_SET_EXT_PARAMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 130 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_set_ext_params " "Set extended link params: ASD check: %d, Speed select bypass: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , asd_check, speed_select_bypass); #line 4455 "trace/trace-hw_net.h" } else { #line 130 "../hw/net/trace-events" qemu_log("e1000e_link_set_ext_params " "Set extended link params: ASD check: %d, Speed select bypass: %d" "\n", asd_check, speed_select_bypass); #line 4459 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) { if (true) { _nocheck__trace_e1000e_link_set_ext_params(asd_check, speed_select_bypass); } } #define TRACE_E1000E_LINK_STATUS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_STATUS) || \ false) static inline void _nocheck__trace_e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) { if (trace_event_get_state(TRACE_E1000E_LINK_STATUS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 131 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_status " "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , link_up, full_dplx, speed, asdv); #line 4486 "trace/trace-hw_net.h" } else { #line 131 "../hw/net/trace-events" qemu_log("e1000e_link_status " "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d" "\n", link_up, full_dplx, speed, asdv); #line 4490 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) { if (true) { _nocheck__trace_e1000e_link_status(link_up, full_dplx, speed, asdv); } } #define TRACE_E1000E_LINK_STATUS_CHANGED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_LINK_STATUS_CHANGED) || \ false) static inline void _nocheck__trace_e1000e_link_status_changed(bool status) { if (trace_event_get_state(TRACE_E1000E_LINK_STATUS_CHANGED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 132 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_link_status_changed " "New link status: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , status); #line 4517 "trace/trace-hw_net.h" } else { #line 132 "../hw/net/trace-events" qemu_log("e1000e_link_status_changed " "New link status: %d" "\n", status); #line 4521 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_link_status_changed(bool status) { if (true) { _nocheck__trace_e1000e_link_status_changed(status); } } #define TRACE_E1000E_WRN_REGS_WRITE_RO_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_REGS_WRITE_RO) || \ false) static inline void _nocheck__trace_e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_WRN_REGS_WRITE_RO) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 134 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_regs_write_ro " "WARNING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, size, val); #line 4548 "trace/trace-hw_net.h" } else { #line 134 "../hw/net/trace-events" qemu_log("e1000e_wrn_regs_write_ro " "WARNING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", index, size, val); #line 4552 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) { if (true) { _nocheck__trace_e1000e_wrn_regs_write_ro(index, size, val); } } #define TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN) || \ false) static inline void _nocheck__trace_e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_WRN_REGS_WRITE_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 135 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_regs_write_unknown " "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, size, val); #line 4579 "trace/trace-hw_net.h" } else { #line 135 "../hw/net/trace-events" qemu_log("e1000e_wrn_regs_write_unknown " "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 "\n", index, size, val); #line 4583 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) { if (true) { _nocheck__trace_e1000e_wrn_regs_write_unknown(index, size, val); } } #define TRACE_E1000E_WRN_REGS_READ_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_REGS_READ_UNKNOWN) || \ false) static inline void _nocheck__trace_e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) { if (trace_event_get_state(TRACE_E1000E_WRN_REGS_READ_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 136 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_regs_read_unknown " "WARNING: Read from unknown register 0x%"PRIx64", %d byte(s)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index, size); #line 4610 "trace/trace-hw_net.h" } else { #line 136 "../hw/net/trace-events" qemu_log("e1000e_wrn_regs_read_unknown " "WARNING: Read from unknown register 0x%"PRIx64", %d byte(s)" "\n", index, size); #line 4614 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) { if (true) { _nocheck__trace_e1000e_wrn_regs_read_unknown(index, size); } } #define TRACE_E1000E_WRN_REGS_READ_TRIVIAL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_REGS_READ_TRIVIAL) || \ false) static inline void _nocheck__trace_e1000e_wrn_regs_read_trivial(uint32_t index) { if (trace_event_get_state(TRACE_E1000E_WRN_REGS_READ_TRIVIAL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 137 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_regs_read_trivial " "WARNING: Reading register at offset: 0x%05x. It is not fully implemented." "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index); #line 4641 "trace/trace-hw_net.h" } else { #line 137 "../hw/net/trace-events" qemu_log("e1000e_wrn_regs_read_trivial " "WARNING: Reading register at offset: 0x%05x. It is not fully implemented." "\n", index); #line 4645 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_regs_read_trivial(uint32_t index) { if (true) { _nocheck__trace_e1000e_wrn_regs_read_trivial(index); } } #define TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL) || \ false) static inline void _nocheck__trace_e1000e_wrn_regs_write_trivial(uint32_t index) { if (trace_event_get_state(TRACE_E1000E_WRN_REGS_WRITE_TRIVIAL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 138 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_regs_write_trivial " "WARNING: Writing to register at offset: 0x%05x. It is not fully implemented." "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , index); #line 4672 "trace/trace-hw_net.h" } else { #line 138 "../hw/net/trace-events" qemu_log("e1000e_wrn_regs_write_trivial " "WARNING: Writing to register at offset: 0x%05x. It is not fully implemented." "\n", index); #line 4676 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_regs_write_trivial(uint32_t index) { if (true) { _nocheck__trace_e1000e_wrn_regs_write_trivial(index); } } #define TRACE_E1000E_WRN_NO_TS_SUPPORT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_NO_TS_SUPPORT) || \ false) static inline void _nocheck__trace_e1000e_wrn_no_ts_support(void) { if (trace_event_get_state(TRACE_E1000E_WRN_NO_TS_SUPPORT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 139 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_no_ts_support " "WARNING: Guest requested TX timestamping which is not supported" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4703 "trace/trace-hw_net.h" } else { #line 139 "../hw/net/trace-events" qemu_log("e1000e_wrn_no_ts_support " "WARNING: Guest requested TX timestamping which is not supported" "\n"); #line 4707 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_no_ts_support(void) { if (true) { _nocheck__trace_e1000e_wrn_no_ts_support(); } } #define TRACE_E1000E_WRN_NO_SNAP_SUPPORT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_NO_SNAP_SUPPORT) || \ false) static inline void _nocheck__trace_e1000e_wrn_no_snap_support(void) { if (trace_event_get_state(TRACE_E1000E_WRN_NO_SNAP_SUPPORT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 140 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_no_snap_support " "WARNING: Guest requested TX SNAP header update which is not supported" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4734 "trace/trace-hw_net.h" } else { #line 140 "../hw/net/trace-events" qemu_log("e1000e_wrn_no_snap_support " "WARNING: Guest requested TX SNAP header update which is not supported" "\n"); #line 4738 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_no_snap_support(void) { if (true) { _nocheck__trace_e1000e_wrn_no_snap_support(); } } #define TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED) || \ false) static inline void _nocheck__trace_e1000e_wrn_iscsi_filtering_not_supported(void) { if (trace_event_get_state(TRACE_E1000E_WRN_ISCSI_FILTERING_NOT_SUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 141 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_iscsi_filtering_not_supported " "WARNING: Guest requested iSCSI filtering which is not supported" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4765 "trace/trace-hw_net.h" } else { #line 141 "../hw/net/trace-events" qemu_log("e1000e_wrn_iscsi_filtering_not_supported " "WARNING: Guest requested iSCSI filtering which is not supported" "\n"); #line 4769 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_iscsi_filtering_not_supported(void) { if (true) { _nocheck__trace_e1000e_wrn_iscsi_filtering_not_supported(); } } #define TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED) || \ false) static inline void _nocheck__trace_e1000e_wrn_nfsw_filtering_not_supported(void) { if (trace_event_get_state(TRACE_E1000E_WRN_NFSW_FILTERING_NOT_SUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 142 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_nfsw_filtering_not_supported " "WARNING: Guest requested NFS write filtering which is not supported" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4796 "trace/trace-hw_net.h" } else { #line 142 "../hw/net/trace-events" qemu_log("e1000e_wrn_nfsw_filtering_not_supported " "WARNING: Guest requested NFS write filtering which is not supported" "\n"); #line 4800 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_nfsw_filtering_not_supported(void) { if (true) { _nocheck__trace_e1000e_wrn_nfsw_filtering_not_supported(); } } #define TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED) || \ false) static inline void _nocheck__trace_e1000e_wrn_nfsr_filtering_not_supported(void) { if (trace_event_get_state(TRACE_E1000E_WRN_NFSR_FILTERING_NOT_SUPPORTED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 143 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_nfsr_filtering_not_supported " "WARNING: Guest requested NFS read filtering which is not supported" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4827 "trace/trace-hw_net.h" } else { #line 143 "../hw/net/trace-events" qemu_log("e1000e_wrn_nfsr_filtering_not_supported " "WARNING: Guest requested NFS read filtering which is not supported" "\n"); #line 4831 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_nfsr_filtering_not_supported(void) { if (true) { _nocheck__trace_e1000e_wrn_nfsr_filtering_not_supported(); } } #define TRACE_E1000E_TX_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_TX_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_tx_disabled(void) { if (trace_event_get_state(TRACE_E1000E_TX_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 145 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_tx_disabled " "TX Disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4858 "trace/trace-hw_net.h" } else { #line 145 "../hw/net/trace-events" qemu_log("e1000e_tx_disabled " "TX Disabled" "\n"); #line 4862 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_tx_disabled(void) { if (true) { _nocheck__trace_e1000e_tx_disabled(); } } #define TRACE_E1000E_TX_DESCR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_TX_DESCR) || \ false) static inline void _nocheck__trace_e1000e_tx_descr(void * addr, uint32_t lower, uint32_t upper) { if (trace_event_get_state(TRACE_E1000E_TX_DESCR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 146 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_tx_descr " "%p : %x %x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, lower, upper); #line 4889 "trace/trace-hw_net.h" } else { #line 146 "../hw/net/trace-events" qemu_log("e1000e_tx_descr " "%p : %x %x" "\n", addr, lower, upper); #line 4893 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_tx_descr(void * addr, uint32_t lower, uint32_t upper) { if (true) { _nocheck__trace_e1000e_tx_descr(addr, lower, upper); } } #define TRACE_E1000E_RING_FREE_SPACE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RING_FREE_SPACE) || \ false) static inline void _nocheck__trace_e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) { if (trace_event_get_state(TRACE_E1000E_RING_FREE_SPACE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 148 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_ring_free_space " "ring #%d: LEN: %u, DH: %u, DT: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ridx, rdlen, rdh, rdt); #line 4920 "trace/trace-hw_net.h" } else { #line 148 "../hw/net/trace-events" qemu_log("e1000e_ring_free_space " "ring #%d: LEN: %u, DH: %u, DT: %u" "\n", ridx, rdlen, rdh, rdt); #line 4924 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) { if (true) { _nocheck__trace_e1000e_ring_free_space(ridx, rdlen, rdh, rdt); } } #define TRACE_E1000E_RX_CAN_RECV_RINGS_FULL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_CAN_RECV_RINGS_FULL) || \ false) static inline void _nocheck__trace_e1000e_rx_can_recv_rings_full(void) { if (trace_event_get_state(TRACE_E1000E_RX_CAN_RECV_RINGS_FULL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 150 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_can_recv_rings_full " "Cannot receive: all rings are full" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4951 "trace/trace-hw_net.h" } else { #line 150 "../hw/net/trace-events" qemu_log("e1000e_rx_can_recv_rings_full " "Cannot receive: all rings are full" "\n"); #line 4955 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_can_recv_rings_full(void) { if (true) { _nocheck__trace_e1000e_rx_can_recv_rings_full(); } } #define TRACE_E1000E_RX_CAN_RECV_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_CAN_RECV) || \ false) static inline void _nocheck__trace_e1000e_rx_can_recv(void) { if (trace_event_get_state(TRACE_E1000E_RX_CAN_RECV) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 151 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_can_recv " "Can receive" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 4982 "trace/trace-hw_net.h" } else { #line 151 "../hw/net/trace-events" qemu_log("e1000e_rx_can_recv " "Can receive" "\n"); #line 4986 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_can_recv(void) { if (true) { _nocheck__trace_e1000e_rx_can_recv(); } } #define TRACE_E1000E_RX_HAS_BUFFERS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_HAS_BUFFERS) || \ false) static inline void _nocheck__trace_e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) { if (trace_event_get_state(TRACE_E1000E_RX_HAS_BUFFERS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 152 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_has_buffers " "ring #%d: free descr: %u, packet size %zu, descr buffer size %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ridx, free_desc, total_size, desc_buf_size); #line 5013 "trace/trace-hw_net.h" } else { #line 152 "../hw/net/trace-events" qemu_log("e1000e_rx_has_buffers " "ring #%d: free descr: %u, packet size %zu, descr buffer size %u" "\n", ridx, free_desc, total_size, desc_buf_size); #line 5017 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) { if (true) { _nocheck__trace_e1000e_rx_has_buffers(ridx, free_desc, total_size, desc_buf_size); } } #define TRACE_E1000E_RX_NULL_DESCRIPTOR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_NULL_DESCRIPTOR) || \ false) static inline void _nocheck__trace_e1000e_rx_null_descriptor(void) { if (trace_event_get_state(TRACE_E1000E_RX_NULL_DESCRIPTOR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 153 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_null_descriptor " "Null RX descriptor!!" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5044 "trace/trace-hw_net.h" } else { #line 153 "../hw/net/trace-events" qemu_log("e1000e_rx_null_descriptor " "Null RX descriptor!!" "\n"); #line 5048 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_null_descriptor(void) { if (true) { _nocheck__trace_e1000e_rx_null_descriptor(); } } #define TRACE_E1000E_RX_DESC_PS_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESC_PS_READ) || \ false) static inline void _nocheck__trace_e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) { if (trace_event_get_state(TRACE_E1000E_RX_DESC_PS_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 154 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_desc_ps_read " "buffers: [0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64"]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , a0, a1, a2, a3); #line 5075 "trace/trace-hw_net.h" } else { #line 154 "../hw/net/trace-events" qemu_log("e1000e_rx_desc_ps_read " "buffers: [0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64"]" "\n", a0, a1, a2, a3); #line 5079 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) { if (true) { _nocheck__trace_e1000e_rx_desc_ps_read(a0, a1, a2, a3); } } #define TRACE_E1000E_RX_DESC_PS_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESC_PS_WRITE) || \ false) static inline void _nocheck__trace_e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) { if (trace_event_get_state(TRACE_E1000E_RX_DESC_PS_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 155 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_desc_ps_write " "bytes written: [%u, %u, %u, %u]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , a0, a1, a2, a3); #line 5106 "trace/trace-hw_net.h" } else { #line 155 "../hw/net/trace-events" qemu_log("e1000e_rx_desc_ps_write " "bytes written: [%u, %u, %u, %u]" "\n", a0, a1, a2, a3); #line 5110 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) { if (true) { _nocheck__trace_e1000e_rx_desc_ps_write(a0, a1, a2, a3); } } #define TRACE_E1000E_RX_DESC_BUFF_SIZES_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESC_BUFF_SIZES) || \ false) static inline void _nocheck__trace_e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) { if (trace_event_get_state(TRACE_E1000E_RX_DESC_BUFF_SIZES) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 156 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_desc_buff_sizes " "buffer sizes: [%u, %u, %u, %u]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3); #line 5137 "trace/trace-hw_net.h" } else { #line 156 "../hw/net/trace-events" qemu_log("e1000e_rx_desc_buff_sizes " "buffer sizes: [%u, %u, %u, %u]" "\n", b0, b1, b2, b3); #line 5141 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) { if (true) { _nocheck__trace_e1000e_rx_desc_buff_sizes(b0, b1, b2, b3); } } #define TRACE_E1000E_RX_DESC_LEN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESC_LEN) || \ false) static inline void _nocheck__trace_e1000e_rx_desc_len(uint8_t rx_desc_len) { if (trace_event_get_state(TRACE_E1000E_RX_DESC_LEN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 157 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_desc_len " "RX descriptor length: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rx_desc_len); #line 5168 "trace/trace-hw_net.h" } else { #line 157 "../hw/net/trace-events" qemu_log("e1000e_rx_desc_len " "RX descriptor length: %u" "\n", rx_desc_len); #line 5172 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_desc_len(uint8_t rx_desc_len) { if (true) { _nocheck__trace_e1000e_rx_desc_len(rx_desc_len); } } #define TRACE_E1000E_RX_DESC_BUFF_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESC_BUFF_WRITE) || \ false) static inline void _nocheck__trace_e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) { if (trace_event_get_state(TRACE_E1000E_RX_DESC_BUFF_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 158 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_desc_buff_write " "buffer #%u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, addr, offset, source, len); #line 5199 "trace/trace-hw_net.h" } else { #line 158 "../hw/net/trace-events" qemu_log("e1000e_rx_desc_buff_write " "buffer #%u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" "\n", idx, addr, offset, source, len); #line 5203 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) { if (true) { _nocheck__trace_e1000e_rx_desc_buff_write(idx, addr, offset, source, len); } } #define TRACE_E1000E_RX_DESCR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_DESCR) || \ false) static inline void _nocheck__trace_e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) { if (trace_event_get_state(TRACE_E1000E_RX_DESCR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 159 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_descr " "Next RX descriptor: ring #%d, PA: 0x%"PRIx64", length: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ridx, base, len); #line 5230 "trace/trace-hw_net.h" } else { #line 159 "../hw/net/trace-events" qemu_log("e1000e_rx_descr " "Next RX descriptor: ring #%d, PA: 0x%"PRIx64", length: %u" "\n", ridx, base, len); #line 5234 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) { if (true) { _nocheck__trace_e1000e_rx_descr(ridx, base, len); } } #define TRACE_E1000E_RX_SET_RCTL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_SET_RCTL) || \ false) static inline void _nocheck__trace_e1000e_rx_set_rctl(uint32_t rctl) { if (trace_event_get_state(TRACE_E1000E_RX_SET_RCTL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 160 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_set_rctl " "RCTL = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rctl); #line 5261 "trace/trace-hw_net.h" } else { #line 160 "../hw/net/trace-events" qemu_log("e1000e_rx_set_rctl " "RCTL = 0x%x" "\n", rctl); #line 5265 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_set_rctl(uint32_t rctl) { if (true) { _nocheck__trace_e1000e_rx_set_rctl(rctl); } } #define TRACE_E1000E_RX_RECEIVE_IOV_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RECEIVE_IOV) || \ false) static inline void _nocheck__trace_e1000e_rx_receive_iov(int iovcnt) { if (trace_event_get_state(TRACE_E1000E_RX_RECEIVE_IOV) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 161 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_receive_iov " "Received vector of %d fragments" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , iovcnt); #line 5292 "trace/trace-hw_net.h" } else { #line 161 "../hw/net/trace-events" qemu_log("e1000e_rx_receive_iov " "Received vector of %d fragments" "\n", iovcnt); #line 5296 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_receive_iov(int iovcnt) { if (true) { _nocheck__trace_e1000e_rx_receive_iov(iovcnt); } } #define TRACE_E1000E_RX_FLT_DROPPED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_FLT_DROPPED) || \ false) static inline void _nocheck__trace_e1000e_rx_flt_dropped(void) { if (trace_event_get_state(TRACE_E1000E_RX_FLT_DROPPED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 162 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_flt_dropped " "Received packet dropped by RX filter" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5323 "trace/trace-hw_net.h" } else { #line 162 "../hw/net/trace-events" qemu_log("e1000e_rx_flt_dropped " "Received packet dropped by RX filter" "\n"); #line 5327 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_flt_dropped(void) { if (true) { _nocheck__trace_e1000e_rx_flt_dropped(); } } #define TRACE_E1000E_RX_WRITTEN_TO_GUEST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_WRITTEN_TO_GUEST) || \ false) static inline void _nocheck__trace_e1000e_rx_written_to_guest(int queue_idx) { if (trace_event_get_state(TRACE_E1000E_RX_WRITTEN_TO_GUEST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 163 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_written_to_guest " "Received packet written to guest (queue %d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , queue_idx); #line 5354 "trace/trace-hw_net.h" } else { #line 163 "../hw/net/trace-events" qemu_log("e1000e_rx_written_to_guest " "Received packet written to guest (queue %d)" "\n", queue_idx); #line 5358 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_written_to_guest(int queue_idx) { if (true) { _nocheck__trace_e1000e_rx_written_to_guest(queue_idx); } } #define TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST) || \ false) static inline void _nocheck__trace_e1000e_rx_not_written_to_guest(int queue_idx) { if (trace_event_get_state(TRACE_E1000E_RX_NOT_WRITTEN_TO_GUEST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 164 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_not_written_to_guest " "Received packet NOT written to guest (queue %d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , queue_idx); #line 5385 "trace/trace-hw_net.h" } else { #line 164 "../hw/net/trace-events" qemu_log("e1000e_rx_not_written_to_guest " "Received packet NOT written to guest (queue %d)" "\n", queue_idx); #line 5389 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_not_written_to_guest(int queue_idx) { if (true) { _nocheck__trace_e1000e_rx_not_written_to_guest(queue_idx); } } #define TRACE_E1000E_RX_INTERRUPT_SET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_INTERRUPT_SET) || \ false) static inline void _nocheck__trace_e1000e_rx_interrupt_set(uint32_t causes) { if (trace_event_get_state(TRACE_E1000E_RX_INTERRUPT_SET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 165 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_interrupt_set " "Receive interrupt set (ICR causes %u)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , causes); #line 5416 "trace/trace-hw_net.h" } else { #line 165 "../hw/net/trace-events" qemu_log("e1000e_rx_interrupt_set " "Receive interrupt set (ICR causes %u)" "\n", causes); #line 5420 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_interrupt_set(uint32_t causes) { if (true) { _nocheck__trace_e1000e_rx_interrupt_set(causes); } } #define TRACE_E1000E_RX_INTERRUPT_DELAYED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_INTERRUPT_DELAYED) || \ false) static inline void _nocheck__trace_e1000e_rx_interrupt_delayed(uint32_t causes) { if (trace_event_get_state(TRACE_E1000E_RX_INTERRUPT_DELAYED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 166 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_interrupt_delayed " "Receive interrupt delayed (ICR causes %u)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , causes); #line 5447 "trace/trace-hw_net.h" } else { #line 166 "../hw/net/trace-events" qemu_log("e1000e_rx_interrupt_delayed " "Receive interrupt delayed (ICR causes %u)" "\n", causes); #line 5451 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_interrupt_delayed(uint32_t causes) { if (true) { _nocheck__trace_e1000e_rx_interrupt_delayed(causes); } } #define TRACE_E1000E_RX_SET_CSO_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_SET_CSO) || \ false) static inline void _nocheck__trace_e1000e_rx_set_cso(int cso_state) { if (trace_event_get_state(TRACE_E1000E_RX_SET_CSO) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 167 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_set_cso " "RX CSO state set to %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cso_state); #line 5478 "trace/trace-hw_net.h" } else { #line 167 "../hw/net/trace-events" qemu_log("e1000e_rx_set_cso " "RX CSO state set to %d" "\n", cso_state); #line 5482 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_set_cso(int cso_state) { if (true) { _nocheck__trace_e1000e_rx_set_cso(cso_state); } } #define TRACE_E1000E_RX_SET_RDT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_SET_RDT) || \ false) static inline void _nocheck__trace_e1000e_rx_set_rdt(int queue_idx, uint32_t val) { if (trace_event_get_state(TRACE_E1000E_RX_SET_RDT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 168 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_set_rdt " "Setting RDT[%d] = %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , queue_idx, val); #line 5509 "trace/trace-hw_net.h" } else { #line 168 "../hw/net/trace-events" qemu_log("e1000e_rx_set_rdt " "Setting RDT[%d] = %u" "\n", queue_idx, val); #line 5513 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_set_rdt(int queue_idx, uint32_t val) { if (true) { _nocheck__trace_e1000e_rx_set_rdt(queue_idx, val); } } #define TRACE_E1000E_RX_SET_RFCTL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_SET_RFCTL) || \ false) static inline void _nocheck__trace_e1000e_rx_set_rfctl(uint32_t val) { if (trace_event_get_state(TRACE_E1000E_RX_SET_RFCTL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 169 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_set_rfctl " "Setting RFCTL = 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 5540 "trace/trace-hw_net.h" } else { #line 169 "../hw/net/trace-events" qemu_log("e1000e_rx_set_rfctl " "Setting RFCTL = 0x%X" "\n", val); #line 5544 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_set_rfctl(uint32_t val) { if (true) { _nocheck__trace_e1000e_rx_set_rfctl(val); } } #define TRACE_E1000E_RX_START_RECV_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_START_RECV) || \ false) static inline void _nocheck__trace_e1000e_rx_start_recv(void) { if (trace_event_get_state(TRACE_E1000E_RX_START_RECV) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 170 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_start_recv " "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5571 "trace/trace-hw_net.h" } else { #line 170 "../hw/net/trace-events" qemu_log("e1000e_rx_start_recv " "\n"); #line 5575 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_start_recv(void) { if (true) { _nocheck__trace_e1000e_rx_start_recv(); } } #define TRACE_E1000E_RX_RSS_STARTED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_STARTED) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_started(void) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_STARTED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 172 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_started " "Starting RSS processing" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5602 "trace/trace-hw_net.h" } else { #line 172 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_started " "Starting RSS processing" "\n"); #line 5606 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_started(void) { if (true) { _nocheck__trace_e1000e_rx_rss_started(); } } #define TRACE_E1000E_RX_RSS_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_disabled(void) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 173 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_disabled " "RSS is disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5633 "trace/trace-hw_net.h" } else { #line 173 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_disabled " "RSS is disabled" "\n"); #line 5637 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_disabled(void) { if (true) { _nocheck__trace_e1000e_rx_rss_disabled(); } } #define TRACE_E1000E_RX_RSS_TYPE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_TYPE) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_type(uint32_t type) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_TYPE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 174 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_type " "RSS type is %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , type); #line 5664 "trace/trace-hw_net.h" } else { #line 174 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_type " "RSS type is %u" "\n", type); #line 5668 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_type(uint32_t type) { if (true) { _nocheck__trace_e1000e_rx_rss_type(type); } } #define TRACE_E1000E_RX_RSS_IP4_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_IP4) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_ip4(int l4hdr_proto, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_IP4) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 175 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_ip4 " "RSS IPv4: L4 header protocol %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , l4hdr_proto, mrqc, tcpipv4_enabled, ipv4_enabled); #line 5695 "trace/trace-hw_net.h" } else { #line 175 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_ip4 " "RSS IPv4: L4 header protocol %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d" "\n", l4hdr_proto, mrqc, tcpipv4_enabled, ipv4_enabled); #line 5699 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_ip4(int l4hdr_proto, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) { if (true) { _nocheck__trace_e1000e_rx_rss_ip4(l4hdr_proto, mrqc, tcpipv4_enabled, ipv4_enabled); } } #define TRACE_E1000E_RX_RSS_IP6_RFCTL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_IP6_RFCTL) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_IP6_RFCTL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 176 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_ip6_rfctl " "RSS IPv6: rfctl 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rfctl); #line 5726 "trace/trace-hw_net.h" } else { #line 176 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_ip6_rfctl " "RSS IPv6: rfctl 0x%X" "\n", rfctl); #line 5730 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) { if (true) { _nocheck__trace_e1000e_rx_rss_ip6_rfctl(rfctl); } } #define TRACE_E1000E_RX_RSS_IP6_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_RSS_IP6) || \ false) static inline void _nocheck__trace_e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, int l4hdr_proto, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6ex_enabled, bool ipv6ex_enabled, bool ipv6_enabled) { if (trace_event_get_state(TRACE_E1000E_RX_RSS_IP6) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 177 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_rss_ip6 " "RSS IPv6: ex_dis: %d, new_ex_dis: %d, L4 header protocol %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6ex enabled %d, ipv6ex enabled %d, ipv6 enabled %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ex_dis, new_ex_dis, l4hdr_proto, has_ext_headers, ex_dst_valid, ex_src_valid, mrqc, tcpipv6ex_enabled, ipv6ex_enabled, ipv6_enabled); #line 5757 "trace/trace-hw_net.h" } else { #line 177 "../hw/net/trace-events" qemu_log("e1000e_rx_rss_ip6 " "RSS IPv6: ex_dis: %d, new_ex_dis: %d, L4 header protocol %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6ex enabled %d, ipv6ex enabled %d, ipv6 enabled %d" "\n", ex_dis, new_ex_dis, l4hdr_proto, has_ext_headers, ex_dst_valid, ex_src_valid, mrqc, tcpipv6ex_enabled, ipv6ex_enabled, ipv6_enabled); #line 5761 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, int l4hdr_proto, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6ex_enabled, bool ipv6ex_enabled, bool ipv6_enabled) { if (true) { _nocheck__trace_e1000e_rx_rss_ip6(ex_dis, new_ex_dis, l4hdr_proto, has_ext_headers, ex_dst_valid, ex_src_valid, mrqc, tcpipv6ex_enabled, ipv6ex_enabled, ipv6_enabled); } } #define TRACE_E1000E_RX_METADATA_PROTOCOLS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_PROTOCOLS) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_PROTOCOLS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 179 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_protocols " "protocols: ip4: %d, ip6: %d, l4hdr: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , hasip4, hasip6, l4hdr_protocol); #line 5788 "trace/trace-hw_net.h" } else { #line 179 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_protocols " "protocols: ip4: %d, ip6: %d, l4hdr: %d" "\n", hasip4, hasip6, l4hdr_protocol); #line 5792 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) { if (true) { _nocheck__trace_e1000e_rx_metadata_protocols(hasip4, hasip6, l4hdr_protocol); } } #define TRACE_E1000E_RX_METADATA_VLAN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_VLAN) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_vlan(uint16_t vlan_tag) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_VLAN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 180 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_vlan " "VLAN tag is 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vlan_tag); #line 5819 "trace/trace-hw_net.h" } else { #line 180 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_vlan " "VLAN tag is 0x%X" "\n", vlan_tag); #line 5823 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_vlan(uint16_t vlan_tag) { if (true) { _nocheck__trace_e1000e_rx_metadata_vlan(vlan_tag); } } #define TRACE_E1000E_RX_METADATA_RSS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_RSS) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_RSS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 181 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_rss " "RSS data: rss: 0x%X, mrq: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rss, mrq); #line 5850 "trace/trace-hw_net.h" } else { #line 181 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_rss " "RSS data: rss: 0x%X, mrq: 0x%X" "\n", rss, mrq); #line 5854 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) { if (true) { _nocheck__trace_e1000e_rx_metadata_rss(rss, mrq); } } #define TRACE_E1000E_RX_METADATA_IP_ID_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_IP_ID) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_ip_id(uint16_t ip_id) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_IP_ID) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 182 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_ip_id " "the IPv4 ID is 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ip_id); #line 5881 "trace/trace-hw_net.h" } else { #line 182 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_ip_id " "the IPv4 ID is 0x%X" "\n", ip_id); #line 5885 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_ip_id(uint16_t ip_id) { if (true) { _nocheck__trace_e1000e_rx_metadata_ip_id(ip_id); } } #define TRACE_E1000E_RX_METADATA_ACK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_ACK) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_ack(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_ACK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 183 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_ack " "the packet is TCP ACK" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5912 "trace/trace-hw_net.h" } else { #line 183 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_ack " "the packet is TCP ACK" "\n"); #line 5916 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_ack(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_ack(); } } #define TRACE_E1000E_RX_METADATA_PKT_TYPE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_PKT_TYPE) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_pkt_type(uint32_t pkt_type) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_PKT_TYPE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 184 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_pkt_type " "the packet type is %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pkt_type); #line 5943 "trace/trace-hw_net.h" } else { #line 184 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_pkt_type " "the packet type is %u" "\n", pkt_type); #line 5947 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_pkt_type(uint32_t pkt_type) { if (true) { _nocheck__trace_e1000e_rx_metadata_pkt_type(pkt_type); } } #define TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_virthdr_no_csum_info(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_VIRTHDR_NO_CSUM_INFO) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 185 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_virthdr_no_csum_info " "virt-header does not contain checksum info" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 5974 "trace/trace-hw_net.h" } else { #line 185 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_virthdr_no_csum_info " "virt-header does not contain checksum info" "\n"); #line 5978 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_virthdr_no_csum_info(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_virthdr_no_csum_info(); } } #define TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_l3_cso_disabled(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_L3_CSO_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 186 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_l3_cso_disabled " "IP4 CSO is disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6005 "trace/trace-hw_net.h" } else { #line 186 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_l3_cso_disabled " "IP4 CSO is disabled" "\n"); #line 6009 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_l3_cso_disabled(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_l3_cso_disabled(); } } #define TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_l4_cso_disabled(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_L4_CSO_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 187 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_l4_cso_disabled " "TCP/UDP CSO is disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6036 "trace/trace-hw_net.h" } else { #line 187 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_l4_cso_disabled " "TCP/UDP CSO is disabled" "\n"); #line 6040 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_l4_cso_disabled(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_l4_cso_disabled(); } } #define TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_l3_csum_validation_failed(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_L3_CSUM_VALIDATION_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 188 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_l3_csum_validation_failed " "Cannot validate L3 checksum" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6067 "trace/trace-hw_net.h" } else { #line 188 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_l3_csum_validation_failed " "Cannot validate L3 checksum" "\n"); #line 6071 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_l3_csum_validation_failed(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_l3_csum_validation_failed(); } } #define TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_l4_csum_validation_failed(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_L4_CSUM_VALIDATION_FAILED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 189 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_l4_csum_validation_failed " "Cannot validate L4 checksum" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6098 "trace/trace-hw_net.h" } else { #line 189 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_l4_csum_validation_failed " "Cannot validate L4 checksum" "\n"); #line 6102 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_l4_csum_validation_failed(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_l4_csum_validation_failed(); } } #define TRACE_E1000E_RX_METADATA_STATUS_FLAGS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_STATUS_FLAGS) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_status_flags(uint32_t status_flags) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_STATUS_FLAGS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 190 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_status_flags " "status_flags is 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , status_flags); #line 6129 "trace/trace-hw_net.h" } else { #line 190 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_status_flags " "status_flags is 0x%X" "\n", status_flags); #line 6133 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_status_flags(uint32_t status_flags) { if (true) { _nocheck__trace_e1000e_rx_metadata_status_flags(status_flags); } } #define TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_ipv6_sum_disabled(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_IPV6_SUM_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 191 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_ipv6_sum_disabled " "IPv6 RX checksummimg disabled by RFCTL" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6160 "trace/trace-hw_net.h" } else { #line 191 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_ipv6_sum_disabled " "IPv6 RX checksummimg disabled by RFCTL" "\n"); #line 6164 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_ipv6_sum_disabled(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_ipv6_sum_disabled(); } } #define TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED) || \ false) static inline void _nocheck__trace_e1000e_rx_metadata_ipv6_filtering_disabled(void) { if (trace_event_get_state(TRACE_E1000E_RX_METADATA_IPV6_FILTERING_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 192 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_rx_metadata_ipv6_filtering_disabled " "IPv6 RX filtering disabled by RFCTL" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6191 "trace/trace-hw_net.h" } else { #line 192 "../hw/net/trace-events" qemu_log("e1000e_rx_metadata_ipv6_filtering_disabled " "IPv6 RX filtering disabled by RFCTL" "\n"); #line 6195 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_rx_metadata_ipv6_filtering_disabled(void) { if (true) { _nocheck__trace_e1000e_rx_metadata_ipv6_filtering_disabled(); } } #define TRACE_E1000E_VLAN_VET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_VLAN_VET) || \ false) static inline void _nocheck__trace_e1000e_vlan_vet(uint16_t vet) { if (trace_event_get_state(TRACE_E1000E_VLAN_VET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 194 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_vlan_vet " "Setting VLAN ethernet type 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vet); #line 6222 "trace/trace-hw_net.h" } else { #line 194 "../hw/net/trace-events" qemu_log("e1000e_vlan_vet " "Setting VLAN ethernet type 0x%X" "\n", vet); #line 6226 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_vlan_vet(uint16_t vet) { if (true) { _nocheck__trace_e1000e_vlan_vet(vet); } } #define TRACE_E1000E_IRQ_MSI_NOTIFY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_MSI_NOTIFY) || \ false) static inline void _nocheck__trace_e1000e_irq_msi_notify(uint32_t cause) { if (trace_event_get_state(TRACE_E1000E_IRQ_MSI_NOTIFY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 196 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_msi_notify " "MSI notify 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cause); #line 6253 "trace/trace-hw_net.h" } else { #line 196 "../hw/net/trace-events" qemu_log("e1000e_irq_msi_notify " "MSI notify 0x%x" "\n", cause); #line 6257 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_msi_notify(uint32_t cause) { if (true) { _nocheck__trace_e1000e_irq_msi_notify(cause); } } #define TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED) || \ false) static inline void _nocheck__trace_e1000e_irq_msi_notify_postponed(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_MSI_NOTIFY_POSTPONED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 197 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_msi_notify_postponed " "Sending MSI postponed by ITR" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6284 "trace/trace-hw_net.h" } else { #line 197 "../hw/net/trace-events" qemu_log("e1000e_irq_msi_notify_postponed " "Sending MSI postponed by ITR" "\n"); #line 6288 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_msi_notify_postponed(void) { if (true) { _nocheck__trace_e1000e_irq_msi_notify_postponed(); } } #define TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED) || \ false) static inline void _nocheck__trace_e1000e_irq_legacy_notify_postponed(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_LEGACY_NOTIFY_POSTPONED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 198 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_legacy_notify_postponed " "Raising legacy IRQ postponed by ITR" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6315 "trace/trace-hw_net.h" } else { #line 198 "../hw/net/trace-events" qemu_log("e1000e_irq_legacy_notify_postponed " "Raising legacy IRQ postponed by ITR" "\n"); #line 6319 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_legacy_notify_postponed(void) { if (true) { _nocheck__trace_e1000e_irq_legacy_notify_postponed(); } } #define TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC) || \ false) static inline void _nocheck__trace_e1000e_irq_msix_notify_postponed_vec(int idx) { if (trace_event_get_state(TRACE_E1000E_IRQ_MSIX_NOTIFY_POSTPONED_VEC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 199 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_msix_notify_postponed_vec " "Sending MSI-X postponed by EITR[%d]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx); #line 6346 "trace/trace-hw_net.h" } else { #line 199 "../hw/net/trace-events" qemu_log("e1000e_irq_msix_notify_postponed_vec " "Sending MSI-X postponed by EITR[%d]" "\n", idx); #line 6350 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_msix_notify_postponed_vec(int idx) { if (true) { _nocheck__trace_e1000e_irq_msix_notify_postponed_vec(idx); } } #define TRACE_E1000E_IRQ_LEGACY_NOTIFY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_LEGACY_NOTIFY) || \ false) static inline void _nocheck__trace_e1000e_irq_legacy_notify(bool level) { if (trace_event_get_state(TRACE_E1000E_IRQ_LEGACY_NOTIFY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 200 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_legacy_notify " "IRQ line state: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , level); #line 6377 "trace/trace-hw_net.h" } else { #line 200 "../hw/net/trace-events" qemu_log("e1000e_irq_legacy_notify " "IRQ line state: %d" "\n", level); #line 6381 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_legacy_notify(bool level) { if (true) { _nocheck__trace_e1000e_irq_legacy_notify(level); } } #define TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC) || \ false) static inline void _nocheck__trace_e1000e_irq_msix_notify_vec(uint32_t vector) { if (trace_event_get_state(TRACE_E1000E_IRQ_MSIX_NOTIFY_VEC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 201 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_msix_notify_vec " "MSI-X notify vector 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vector); #line 6408 "trace/trace-hw_net.h" } else { #line 201 "../hw/net/trace-events" qemu_log("e1000e_irq_msix_notify_vec " "MSI-X notify vector 0x%x" "\n", vector); #line 6412 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_msix_notify_vec(uint32_t vector) { if (true) { _nocheck__trace_e1000e_irq_msix_notify_vec(vector); } } #define TRACE_E1000E_IRQ_POSTPONED_BY_XITR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_POSTPONED_BY_XITR) || \ false) static inline void _nocheck__trace_e1000e_irq_postponed_by_xitr(uint32_t reg) { if (trace_event_get_state(TRACE_E1000E_IRQ_POSTPONED_BY_XITR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 202 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_postponed_by_xitr " "Interrupt postponed by [E]ITR register 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg); #line 6439 "trace/trace-hw_net.h" } else { #line 202 "../hw/net/trace-events" qemu_log("e1000e_irq_postponed_by_xitr " "Interrupt postponed by [E]ITR register 0x%x" "\n", reg); #line 6443 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_postponed_by_xitr(uint32_t reg) { if (true) { _nocheck__trace_e1000e_irq_postponed_by_xitr(reg); } } #define TRACE_E1000E_IRQ_CLEAR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_CLEAR) || \ false) static inline void _nocheck__trace_e1000e_irq_clear(uint32_t offset, uint32_t old, uint32_t new) { if (trace_event_get_state(TRACE_E1000E_IRQ_CLEAR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 203 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_clear " "Clearing interrupt register 0x%x: 0x%x --> 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , offset, old, new); #line 6470 "trace/trace-hw_net.h" } else { #line 203 "../hw/net/trace-events" qemu_log("e1000e_irq_clear " "Clearing interrupt register 0x%x: 0x%x --> 0x%x" "\n", offset, old, new); #line 6474 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_clear(uint32_t offset, uint32_t old, uint32_t new) { if (true) { _nocheck__trace_e1000e_irq_clear(offset, old, new); } } #define TRACE_E1000E_IRQ_SET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_SET) || \ false) static inline void _nocheck__trace_e1000e_irq_set(uint32_t offset, uint32_t old, uint32_t new) { if (trace_event_get_state(TRACE_E1000E_IRQ_SET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 204 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_set " "Setting interrupt register 0x%x: 0x%x --> 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , offset, old, new); #line 6501 "trace/trace-hw_net.h" } else { #line 204 "../hw/net/trace-events" qemu_log("e1000e_irq_set " "Setting interrupt register 0x%x: 0x%x --> 0x%x" "\n", offset, old, new); #line 6505 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_set(uint32_t offset, uint32_t old, uint32_t new) { if (true) { _nocheck__trace_e1000e_irq_set(offset, old, new); } } #define TRACE_E1000E_IRQ_FIX_ICR_ASSERTED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_FIX_ICR_ASSERTED) || \ false) static inline void _nocheck__trace_e1000e_irq_fix_icr_asserted(uint32_t new_val) { if (trace_event_get_state(TRACE_E1000E_IRQ_FIX_ICR_ASSERTED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 205 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_fix_icr_asserted " "ICR_ASSERTED bit fixed: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , new_val); #line 6532 "trace/trace-hw_net.h" } else { #line 205 "../hw/net/trace-events" qemu_log("e1000e_irq_fix_icr_asserted " "ICR_ASSERTED bit fixed: 0x%x" "\n", new_val); #line 6536 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_fix_icr_asserted(uint32_t new_val) { if (true) { _nocheck__trace_e1000e_irq_fix_icr_asserted(new_val); } } #define TRACE_E1000E_IRQ_ADD_MSI_OTHER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ADD_MSI_OTHER) || \ false) static inline void _nocheck__trace_e1000e_irq_add_msi_other(uint32_t new_val) { if (trace_event_get_state(TRACE_E1000E_IRQ_ADD_MSI_OTHER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 206 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_add_msi_other " "ICR_OTHER bit added: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , new_val); #line 6563 "trace/trace-hw_net.h" } else { #line 206 "../hw/net/trace-events" qemu_log("e1000e_irq_add_msi_other " "ICR_OTHER bit added: 0x%x" "\n", new_val); #line 6567 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_add_msi_other(uint32_t new_val) { if (true) { _nocheck__trace_e1000e_irq_add_msi_other(new_val); } } #define TRACE_E1000E_IRQ_PENDING_INTERRUPTS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_PENDING_INTERRUPTS) || \ false) static inline void _nocheck__trace_e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) { if (trace_event_get_state(TRACE_E1000E_IRQ_PENDING_INTERRUPTS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 207 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_pending_interrupts " "ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pending, icr, ims); #line 6594 "trace/trace-hw_net.h" } else { #line 207 "../hw/net/trace-events" qemu_log("e1000e_irq_pending_interrupts " "ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)" "\n", pending, icr, ims); #line 6598 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) { if (true) { _nocheck__trace_e1000e_irq_pending_interrupts(pending, icr, ims); } } #define TRACE_E1000E_IRQ_WRITE_ICS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_WRITE_ICS) || \ false) static inline void _nocheck__trace_e1000e_irq_write_ics(uint32_t val) { if (trace_event_get_state(TRACE_E1000E_IRQ_WRITE_ICS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 208 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_write_ics " "Adding ICR bits 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 6625 "trace/trace-hw_net.h" } else { #line 208 "../hw/net/trace-events" qemu_log("e1000e_irq_write_ics " "Adding ICR bits 0x%x" "\n", val); #line 6629 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_write_ics(uint32_t val) { if (true) { _nocheck__trace_e1000e_irq_write_ics(val); } } #define TRACE_E1000E_IRQ_ICR_PROCESS_IAME_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_PROCESS_IAME) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_process_iame(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_PROCESS_IAME) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 209 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_process_iame " "Clearing IMS bits due to IAME" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6656 "trace/trace-hw_net.h" } else { #line 209 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_process_iame " "Clearing IMS bits due to IAME" "\n"); #line 6660 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_process_iame(void) { if (true) { _nocheck__trace_e1000e_irq_icr_process_iame(); } } #define TRACE_E1000E_IRQ_READ_ICS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_READ_ICS) || \ false) static inline void _nocheck__trace_e1000e_irq_read_ics(uint32_t ics) { if (trace_event_get_state(TRACE_E1000E_IRQ_READ_ICS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 210 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_read_ics " "Current ICS: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ics); #line 6687 "trace/trace-hw_net.h" } else { #line 210 "../hw/net/trace-events" qemu_log("e1000e_irq_read_ics " "Current ICS: 0x%x" "\n", ics); #line 6691 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_read_ics(uint32_t ics) { if (true) { _nocheck__trace_e1000e_irq_read_ics(ics); } } #define TRACE_E1000E_IRQ_READ_IMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_READ_IMS) || \ false) static inline void _nocheck__trace_e1000e_irq_read_ims(uint32_t ims) { if (trace_event_get_state(TRACE_E1000E_IRQ_READ_IMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 211 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_read_ims " "Current IMS: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ims); #line 6718 "trace/trace-hw_net.h" } else { #line 211 "../hw/net/trace-events" qemu_log("e1000e_irq_read_ims " "Current IMS: 0x%x" "\n", ims); #line 6722 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_read_ims(uint32_t ims) { if (true) { _nocheck__trace_e1000e_irq_read_ims(ims); } } #define TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_clear_nonmsix_icr_read(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_CLEAR_NONMSIX_ICR_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 212 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_clear_nonmsix_icr_read " "Clearing ICR on read due to non MSI-X int" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6749 "trace/trace-hw_net.h" } else { #line 212 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_clear_nonmsix_icr_read " "Clearing ICR on read due to non MSI-X int" "\n"); #line 6753 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_clear_nonmsix_icr_read(void) { if (true) { _nocheck__trace_e1000e_irq_icr_clear_nonmsix_icr_read(); } } #define TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_clear_zero_ims(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_CLEAR_ZERO_IMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 213 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_clear_zero_ims " "Clearing ICR on read due to zero IMS" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6780 "trace/trace-hw_net.h" } else { #line 213 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_clear_zero_ims " "Clearing ICR on read due to zero IMS" "\n"); #line 6784 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_clear_zero_ims(void) { if (true) { _nocheck__trace_e1000e_irq_icr_clear_zero_ims(); } } #define TRACE_E1000E_IRQ_ICR_CLEAR_IAME_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_CLEAR_IAME) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_clear_iame(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_CLEAR_IAME) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 214 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_clear_iame " "Clearing ICR on read due to IAME" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6811 "trace/trace-hw_net.h" } else { #line 214 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_clear_iame " "Clearing ICR on read due to IAME" "\n"); #line 6815 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_clear_iame(void) { if (true) { _nocheck__trace_e1000e_irq_icr_clear_iame(); } } #define TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_CLEAR_ICR_BIT_IMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 215 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_clear_icr_bit_ims " "Clearing ICR on read due corresponding IMS bit: 0x%x & 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , icr, ims); #line 6842 "trace/trace-hw_net.h" } else { #line 215 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_clear_icr_bit_ims " "Clearing ICR on read due corresponding IMS bit: 0x%x & 0x%x" "\n", icr, ims); #line 6846 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) { if (true) { _nocheck__trace_e1000e_irq_icr_clear_icr_bit_ims(icr, ims); } } #define TRACE_E1000E_IRQ_IAM_CLEAR_EIAME_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_IAM_CLEAR_EIAME) || \ false) static inline void _nocheck__trace_e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) { if (trace_event_get_state(TRACE_E1000E_IRQ_IAM_CLEAR_EIAME) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 216 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_iam_clear_eiame " "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , iam, cause); #line 6873 "trace/trace-hw_net.h" } else { #line 216 "../hw/net/trace-events" qemu_log("e1000e_irq_iam_clear_eiame " "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" "\n", iam, cause); #line 6877 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) { if (true) { _nocheck__trace_e1000e_irq_iam_clear_eiame(iam, cause); } } #define TRACE_E1000E_IRQ_ICR_CLEAR_EIAC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ICR_CLEAR_EIAC) || \ false) static inline void _nocheck__trace_e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) { if (trace_event_get_state(TRACE_E1000E_IRQ_ICR_CLEAR_EIAC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 217 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_icr_clear_eiac " "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , icr, eiac); #line 6904 "trace/trace-hw_net.h" } else { #line 217 "../hw/net/trace-events" qemu_log("e1000e_irq_icr_clear_eiac " "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X" "\n", icr, eiac); #line 6908 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) { if (true) { _nocheck__trace_e1000e_irq_icr_clear_eiac(icr, eiac); } } #define TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC) || \ false) static inline void _nocheck__trace_e1000e_irq_ims_clear_set_imc(uint32_t val) { if (trace_event_get_state(TRACE_E1000E_IRQ_IMS_CLEAR_SET_IMC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 218 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_ims_clear_set_imc " "Clearing IMS bits due to IMC write 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 6935 "trace/trace-hw_net.h" } else { #line 218 "../hw/net/trace-events" qemu_log("e1000e_irq_ims_clear_set_imc " "Clearing IMS bits due to IMC write 0x%x" "\n", val); #line 6939 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_ims_clear_set_imc(uint32_t val) { if (true) { _nocheck__trace_e1000e_irq_ims_clear_set_imc(val); } } #define TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS) || \ false) static inline void _nocheck__trace_e1000e_irq_fire_delayed_interrupts(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_FIRE_DELAYED_INTERRUPTS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 219 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_fire_delayed_interrupts " "Firing delayed interrupts" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 6966 "trace/trace-hw_net.h" } else { #line 219 "../hw/net/trace-events" qemu_log("e1000e_irq_fire_delayed_interrupts " "Firing delayed interrupts" "\n"); #line 6970 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_fire_delayed_interrupts(void) { if (true) { _nocheck__trace_e1000e_irq_fire_delayed_interrupts(); } } #define TRACE_E1000E_IRQ_REARM_TIMER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_REARM_TIMER) || \ false) static inline void _nocheck__trace_e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) { if (trace_event_get_state(TRACE_E1000E_IRQ_REARM_TIMER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 220 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_rearm_timer " "Mitigation timer armed for register 0x%X, delay %"PRId64" ns" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, delay_ns); #line 6997 "trace/trace-hw_net.h" } else { #line 220 "../hw/net/trace-events" qemu_log("e1000e_irq_rearm_timer " "Mitigation timer armed for register 0x%X, delay %"PRId64" ns" "\n", reg, delay_ns); #line 7001 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) { if (true) { _nocheck__trace_e1000e_irq_rearm_timer(reg, delay_ns); } } #define TRACE_E1000E_IRQ_THROTTLING_TIMER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_THROTTLING_TIMER) || \ false) static inline void _nocheck__trace_e1000e_irq_throttling_timer(uint32_t reg) { if (trace_event_get_state(TRACE_E1000E_IRQ_THROTTLING_TIMER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 221 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_throttling_timer " "Mitigation timer shot for register 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg); #line 7028 "trace/trace-hw_net.h" } else { #line 221 "../hw/net/trace-events" qemu_log("e1000e_irq_throttling_timer " "Mitigation timer shot for register 0x%X" "\n", reg); #line 7032 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_throttling_timer(uint32_t reg) { if (true) { _nocheck__trace_e1000e_irq_throttling_timer(reg); } } #define TRACE_E1000E_IRQ_RDTR_FPD_RUNNING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_RDTR_FPD_RUNNING) || \ false) static inline void _nocheck__trace_e1000e_irq_rdtr_fpd_running(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_RDTR_FPD_RUNNING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 222 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_rdtr_fpd_running " "FPD written while RDTR was running" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7059 "trace/trace-hw_net.h" } else { #line 222 "../hw/net/trace-events" qemu_log("e1000e_irq_rdtr_fpd_running " "FPD written while RDTR was running" "\n"); #line 7063 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_rdtr_fpd_running(void) { if (true) { _nocheck__trace_e1000e_irq_rdtr_fpd_running(); } } #define TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING) || \ false) static inline void _nocheck__trace_e1000e_irq_rdtr_fpd_not_running(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_RDTR_FPD_NOT_RUNNING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 223 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_rdtr_fpd_not_running " "FPD written while RDTR was not running" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7090 "trace/trace-hw_net.h" } else { #line 223 "../hw/net/trace-events" qemu_log("e1000e_irq_rdtr_fpd_not_running " "FPD written while RDTR was not running" "\n"); #line 7094 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_rdtr_fpd_not_running(void) { if (true) { _nocheck__trace_e1000e_irq_rdtr_fpd_not_running(); } } #define TRACE_E1000E_IRQ_TIDV_FPD_RUNNING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_TIDV_FPD_RUNNING) || \ false) static inline void _nocheck__trace_e1000e_irq_tidv_fpd_running(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_TIDV_FPD_RUNNING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 224 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_tidv_fpd_running " "FPD written while TIDV was running" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7121 "trace/trace-hw_net.h" } else { #line 224 "../hw/net/trace-events" qemu_log("e1000e_irq_tidv_fpd_running " "FPD written while TIDV was running" "\n"); #line 7125 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_tidv_fpd_running(void) { if (true) { _nocheck__trace_e1000e_irq_tidv_fpd_running(); } } #define TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING) || \ false) static inline void _nocheck__trace_e1000e_irq_tidv_fpd_not_running(void) { if (trace_event_get_state(TRACE_E1000E_IRQ_TIDV_FPD_NOT_RUNNING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 225 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_tidv_fpd_not_running " "FPD written while TIDV was not running" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7152 "trace/trace-hw_net.h" } else { #line 225 "../hw/net/trace-events" qemu_log("e1000e_irq_tidv_fpd_not_running " "FPD written while TIDV was not running" "\n"); #line 7156 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_tidv_fpd_not_running(void) { if (true) { _nocheck__trace_e1000e_irq_tidv_fpd_not_running(); } } #define TRACE_E1000E_IRQ_EITR_SET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_EITR_SET) || \ false) static inline void _nocheck__trace_e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) { if (trace_event_get_state(TRACE_E1000E_IRQ_EITR_SET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 226 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_eitr_set " "EITR[%u] = %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , eitr_num, val); #line 7183 "trace/trace-hw_net.h" } else { #line 226 "../hw/net/trace-events" qemu_log("e1000e_irq_eitr_set " "EITR[%u] = %u" "\n", eitr_num, val); #line 7187 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) { if (true) { _nocheck__trace_e1000e_irq_eitr_set(eitr_num, val); } } #define TRACE_E1000E_IRQ_ITR_SET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_ITR_SET) || \ false) static inline void _nocheck__trace_e1000e_irq_itr_set(uint32_t val) { if (trace_event_get_state(TRACE_E1000E_IRQ_ITR_SET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 227 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_itr_set " "ITR = %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 7214 "trace/trace-hw_net.h" } else { #line 227 "../hw/net/trace-events" qemu_log("e1000e_irq_itr_set " "ITR = %u" "\n", val); #line 7218 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_itr_set(uint32_t val) { if (true) { _nocheck__trace_e1000e_irq_itr_set(val); } } #define TRACE_E1000E_IRQ_FIRE_ALL_TIMERS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_FIRE_ALL_TIMERS) || \ false) static inline void _nocheck__trace_e1000e_irq_fire_all_timers(uint32_t val) { if (trace_event_get_state(TRACE_E1000E_IRQ_FIRE_ALL_TIMERS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 228 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_fire_all_timers " "Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 7245 "trace/trace-hw_net.h" } else { #line 228 "../hw/net/trace-events" qemu_log("e1000e_irq_fire_all_timers " "Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)" "\n", val); #line 7249 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_fire_all_timers(uint32_t val) { if (true) { _nocheck__trace_e1000e_irq_fire_all_timers(val); } } #define TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING) || \ false) static inline void _nocheck__trace_e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) { if (trace_event_get_state(TRACE_E1000E_IRQ_MSIX_PENDING_CLEARING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 229 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_irq_msix_pending_clearing " "Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cause, int_cfg, vec); #line 7276 "trace/trace-hw_net.h" } else { #line 229 "../hw/net/trace-events" qemu_log("e1000e_irq_msix_pending_clearing " "Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u" "\n", cause, int_cfg, vec); #line 7280 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) { if (true) { _nocheck__trace_e1000e_irq_msix_pending_clearing(cause, int_cfg, vec); } } #define TRACE_E1000E_WRN_MSIX_VEC_WRONG_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_MSIX_VEC_WRONG) || \ false) static inline void _nocheck__trace_e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) { if (trace_event_get_state(TRACE_E1000E_WRN_MSIX_VEC_WRONG) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 231 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_msix_vec_wrong " "Invalid configuration for cause 0x%x: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cause, cfg); #line 7307 "trace/trace-hw_net.h" } else { #line 231 "../hw/net/trace-events" qemu_log("e1000e_wrn_msix_vec_wrong " "Invalid configuration for cause 0x%x: 0x%x" "\n", cause, cfg); #line 7311 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) { if (true) { _nocheck__trace_e1000e_wrn_msix_vec_wrong(cause, cfg); } } #define TRACE_E1000E_WRN_MSIX_INVALID_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_MSIX_INVALID) || \ false) static inline void _nocheck__trace_e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) { if (trace_event_get_state(TRACE_E1000E_WRN_MSIX_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 232 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_msix_invalid " "Invalid entry for cause 0x%x: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cause, cfg); #line 7338 "trace/trace-hw_net.h" } else { #line 232 "../hw/net/trace-events" qemu_log("e1000e_wrn_msix_invalid " "Invalid entry for cause 0x%x: 0x%x" "\n", cause, cfg); #line 7342 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) { if (true) { _nocheck__trace_e1000e_wrn_msix_invalid(cause, cfg); } } #define TRACE_E1000E_MAC_SET_SW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_MAC_SET_SW) || \ false) static inline void _nocheck__trace_e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_E1000E_MAC_SET_SW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 234 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_mac_set_sw " "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5); #line 7369 "trace/trace-hw_net.h" } else { #line 234 "../hw/net/trace-events" qemu_log("e1000e_mac_set_sw " "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", b0, b1, b2, b3, b4, b5); #line 7373 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_e1000e_mac_set_sw(b0, b1, b2, b3, b4, b5); } } #define TRACE_E1000E_VM_STATE_RUNNING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_VM_STATE_RUNNING) || \ false) static inline void _nocheck__trace_e1000e_vm_state_running(void) { if (trace_event_get_state(TRACE_E1000E_VM_STATE_RUNNING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 236 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_vm_state_running " "VM state is running" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7400 "trace/trace-hw_net.h" } else { #line 236 "../hw/net/trace-events" qemu_log("e1000e_vm_state_running " "VM state is running" "\n"); #line 7404 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_vm_state_running(void) { if (true) { _nocheck__trace_e1000e_vm_state_running(); } } #define TRACE_E1000E_VM_STATE_STOPPED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_VM_STATE_STOPPED) || \ false) static inline void _nocheck__trace_e1000e_vm_state_stopped(void) { if (trace_event_get_state(TRACE_E1000E_VM_STATE_STOPPED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 237 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_vm_state_stopped " "VM state is stopped" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7431 "trace/trace-hw_net.h" } else { #line 237 "../hw/net/trace-events" qemu_log("e1000e_vm_state_stopped " "VM state is stopped" "\n"); #line 7435 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_vm_state_stopped(void) { if (true) { _nocheck__trace_e1000e_vm_state_stopped(); } } #define TRACE_E1000E_CB_PCI_REALIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CB_PCI_REALIZE) || \ false) static inline void _nocheck__trace_e1000e_cb_pci_realize(void) { if (trace_event_get_state(TRACE_E1000E_CB_PCI_REALIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 240 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cb_pci_realize " "E1000E PCI realize entry" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7462 "trace/trace-hw_net.h" } else { #line 240 "../hw/net/trace-events" qemu_log("e1000e_cb_pci_realize " "E1000E PCI realize entry" "\n"); #line 7466 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cb_pci_realize(void) { if (true) { _nocheck__trace_e1000e_cb_pci_realize(); } } #define TRACE_E1000E_CB_PCI_UNINIT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CB_PCI_UNINIT) || \ false) static inline void _nocheck__trace_e1000e_cb_pci_uninit(void) { if (trace_event_get_state(TRACE_E1000E_CB_PCI_UNINIT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 241 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cb_pci_uninit " "E1000E PCI unit entry" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7493 "trace/trace-hw_net.h" } else { #line 241 "../hw/net/trace-events" qemu_log("e1000e_cb_pci_uninit " "E1000E PCI unit entry" "\n"); #line 7497 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cb_pci_uninit(void) { if (true) { _nocheck__trace_e1000e_cb_pci_uninit(); } } #define TRACE_E1000E_CB_QDEV_RESET_HOLD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CB_QDEV_RESET_HOLD) || \ false) static inline void _nocheck__trace_e1000e_cb_qdev_reset_hold(void) { if (trace_event_get_state(TRACE_E1000E_CB_QDEV_RESET_HOLD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 242 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cb_qdev_reset_hold " "E1000E qdev reset hold" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7524 "trace/trace-hw_net.h" } else { #line 242 "../hw/net/trace-events" qemu_log("e1000e_cb_qdev_reset_hold " "E1000E qdev reset hold" "\n"); #line 7528 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cb_qdev_reset_hold(void) { if (true) { _nocheck__trace_e1000e_cb_qdev_reset_hold(); } } #define TRACE_E1000E_CB_PRE_SAVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CB_PRE_SAVE) || \ false) static inline void _nocheck__trace_e1000e_cb_pre_save(void) { if (trace_event_get_state(TRACE_E1000E_CB_PRE_SAVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 243 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cb_pre_save " "E1000E pre save entry" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7555 "trace/trace-hw_net.h" } else { #line 243 "../hw/net/trace-events" qemu_log("e1000e_cb_pre_save " "E1000E pre save entry" "\n"); #line 7559 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cb_pre_save(void) { if (true) { _nocheck__trace_e1000e_cb_pre_save(); } } #define TRACE_E1000E_CB_POST_LOAD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CB_POST_LOAD) || \ false) static inline void _nocheck__trace_e1000e_cb_post_load(void) { if (trace_event_get_state(TRACE_E1000E_CB_POST_LOAD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 244 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cb_post_load " "E1000E post load entry" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 7586 "trace/trace-hw_net.h" } else { #line 244 "../hw/net/trace-events" qemu_log("e1000e_cb_post_load " "E1000E post load entry" "\n"); #line 7590 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cb_post_load(void) { if (true) { _nocheck__trace_e1000e_cb_post_load(); } } #define TRACE_E1000E_IO_WRITE_ADDR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IO_WRITE_ADDR) || \ false) static inline void _nocheck__trace_e1000e_io_write_addr(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_IO_WRITE_ADDR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 246 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_io_write_addr " "IOADDR write 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7617 "trace/trace-hw_net.h" } else { #line 246 "../hw/net/trace-events" qemu_log("e1000e_io_write_addr " "IOADDR write 0x%"PRIx64 "\n", addr); #line 7621 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_io_write_addr(uint64_t addr) { if (true) { _nocheck__trace_e1000e_io_write_addr(addr); } } #define TRACE_E1000E_IO_WRITE_DATA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IO_WRITE_DATA) || \ false) static inline void _nocheck__trace_e1000e_io_write_data(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_IO_WRITE_DATA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 247 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_io_write_data " "IODATA write 0x%"PRIx64", value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 7648 "trace/trace-hw_net.h" } else { #line 247 "../hw/net/trace-events" qemu_log("e1000e_io_write_data " "IODATA write 0x%"PRIx64", value: 0x%"PRIx64 "\n", addr, val); #line 7652 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_io_write_data(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_e1000e_io_write_data(addr, val); } } #define TRACE_E1000E_IO_READ_ADDR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IO_READ_ADDR) || \ false) static inline void _nocheck__trace_e1000e_io_read_addr(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_IO_READ_ADDR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 248 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_io_read_addr " "IOADDR read 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7679 "trace/trace-hw_net.h" } else { #line 248 "../hw/net/trace-events" qemu_log("e1000e_io_read_addr " "IOADDR read 0x%"PRIx64 "\n", addr); #line 7683 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_io_read_addr(uint64_t addr) { if (true) { _nocheck__trace_e1000e_io_read_addr(addr); } } #define TRACE_E1000E_IO_READ_DATA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_IO_READ_DATA) || \ false) static inline void _nocheck__trace_e1000e_io_read_data(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_E1000E_IO_READ_DATA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 249 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_io_read_data " "IODATA read 0x%"PRIx64", value: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 7710 "trace/trace-hw_net.h" } else { #line 249 "../hw/net/trace-events" qemu_log("e1000e_io_read_data " "IODATA read 0x%"PRIx64", value: 0x%"PRIx64 "\n", addr, val); #line 7714 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_io_read_data(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_e1000e_io_read_data(addr, val); } } #define TRACE_E1000E_WRN_IO_WRITE_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_IO_WRITE_UNKNOWN) || \ false) static inline void _nocheck__trace_e1000e_wrn_io_write_unknown(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_WRN_IO_WRITE_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 250 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_io_write_unknown " "IO write unknown address 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7741 "trace/trace-hw_net.h" } else { #line 250 "../hw/net/trace-events" qemu_log("e1000e_wrn_io_write_unknown " "IO write unknown address 0x%"PRIx64 "\n", addr); #line 7745 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_io_write_unknown(uint64_t addr) { if (true) { _nocheck__trace_e1000e_wrn_io_write_unknown(addr); } } #define TRACE_E1000E_WRN_IO_READ_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_IO_READ_UNKNOWN) || \ false) static inline void _nocheck__trace_e1000e_wrn_io_read_unknown(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_WRN_IO_READ_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 251 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_io_read_unknown " "IO read unknown address 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7772 "trace/trace-hw_net.h" } else { #line 251 "../hw/net/trace-events" qemu_log("e1000e_wrn_io_read_unknown " "IO read unknown address 0x%"PRIx64 "\n", addr); #line 7776 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_io_read_unknown(uint64_t addr) { if (true) { _nocheck__trace_e1000e_wrn_io_read_unknown(addr); } } #define TRACE_E1000E_WRN_IO_ADDR_UNDEFINED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_IO_ADDR_UNDEFINED) || \ false) static inline void _nocheck__trace_e1000e_wrn_io_addr_undefined(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_WRN_IO_ADDR_UNDEFINED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 252 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_io_addr_undefined " "IO undefined register 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7803 "trace/trace-hw_net.h" } else { #line 252 "../hw/net/trace-events" qemu_log("e1000e_wrn_io_addr_undefined " "IO undefined register 0x%"PRIx64 "\n", addr); #line 7807 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_io_addr_undefined(uint64_t addr) { if (true) { _nocheck__trace_e1000e_wrn_io_addr_undefined(addr); } } #define TRACE_E1000E_WRN_IO_ADDR_FLASH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_IO_ADDR_FLASH) || \ false) static inline void _nocheck__trace_e1000e_wrn_io_addr_flash(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_WRN_IO_ADDR_FLASH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 253 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_io_addr_flash " "IO flash access (0x%"PRIx64") not implemented" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7834 "trace/trace-hw_net.h" } else { #line 253 "../hw/net/trace-events" qemu_log("e1000e_wrn_io_addr_flash " "IO flash access (0x%"PRIx64") not implemented" "\n", addr); #line 7838 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_io_addr_flash(uint64_t addr) { if (true) { _nocheck__trace_e1000e_wrn_io_addr_flash(addr); } } #define TRACE_E1000E_WRN_IO_ADDR_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_WRN_IO_ADDR_UNKNOWN) || \ false) static inline void _nocheck__trace_e1000e_wrn_io_addr_unknown(uint64_t addr) { if (trace_event_get_state(TRACE_E1000E_WRN_IO_ADDR_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 254 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_wrn_io_addr_unknown " "IO unknown register 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 7865 "trace/trace-hw_net.h" } else { #line 254 "../hw/net/trace-events" qemu_log("e1000e_wrn_io_addr_unknown " "IO unknown register 0x%"PRIx64 "\n", addr); #line 7869 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_wrn_io_addr_unknown(uint64_t addr) { if (true) { _nocheck__trace_e1000e_wrn_io_addr_unknown(addr); } } #define TRACE_E1000E_MSI_INIT_FAIL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_MSI_INIT_FAIL) || \ false) static inline void _nocheck__trace_e1000e_msi_init_fail(int32_t res) { if (trace_event_get_state(TRACE_E1000E_MSI_INIT_FAIL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 256 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_msi_init_fail " "Failed to initialize MSI, error %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , res); #line 7896 "trace/trace-hw_net.h" } else { #line 256 "../hw/net/trace-events" qemu_log("e1000e_msi_init_fail " "Failed to initialize MSI, error %d" "\n", res); #line 7900 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_msi_init_fail(int32_t res) { if (true) { _nocheck__trace_e1000e_msi_init_fail(res); } } #define TRACE_E1000E_MSIX_INIT_FAIL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_MSIX_INIT_FAIL) || \ false) static inline void _nocheck__trace_e1000e_msix_init_fail(int32_t res) { if (trace_event_get_state(TRACE_E1000E_MSIX_INIT_FAIL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 257 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_msix_init_fail " "Failed to initialize MSI-X, error %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , res); #line 7927 "trace/trace-hw_net.h" } else { #line 257 "../hw/net/trace-events" qemu_log("e1000e_msix_init_fail " "Failed to initialize MSI-X, error %d" "\n", res); #line 7931 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_msix_init_fail(int32_t res) { if (true) { _nocheck__trace_e1000e_msix_init_fail(res); } } #define TRACE_E1000E_MSIX_USE_VECTOR_FAIL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_MSIX_USE_VECTOR_FAIL) || \ false) static inline void _nocheck__trace_e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) { if (trace_event_get_state(TRACE_E1000E_MSIX_USE_VECTOR_FAIL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 258 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_msix_use_vector_fail " "Failed to use MSI-X vector %d, error %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vec, res); #line 7958 "trace/trace-hw_net.h" } else { #line 258 "../hw/net/trace-events" qemu_log("e1000e_msix_use_vector_fail " "Failed to use MSI-X vector %d, error %d" "\n", vec, res); #line 7962 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) { if (true) { _nocheck__trace_e1000e_msix_use_vector_fail(vec, res); } } #define TRACE_E1000E_MAC_SET_PERMANENT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_MAC_SET_PERMANENT) || \ false) static inline void _nocheck__trace_e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_E1000E_MAC_SET_PERMANENT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 260 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_mac_set_permanent " "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5); #line 7989 "trace/trace-hw_net.h" } else { #line 260 "../hw/net/trace-events" qemu_log("e1000e_mac_set_permanent " "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", b0, b1, b2, b3, b4, b5); #line 7993 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_e1000e_mac_set_permanent(b0, b1, b2, b3, b4, b5); } } #define TRACE_E1000E_CFG_SUPPORT_VIRTIO_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_E1000E_CFG_SUPPORT_VIRTIO) || \ false) static inline void _nocheck__trace_e1000e_cfg_support_virtio(bool support) { if (trace_event_get_state(TRACE_E1000E_CFG_SUPPORT_VIRTIO) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 261 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:e1000e_cfg_support_virtio " "Virtio header supported: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , support); #line 8020 "trace/trace-hw_net.h" } else { #line 261 "../hw/net/trace-events" qemu_log("e1000e_cfg_support_virtio " "Virtio header supported: %d" "\n", support); #line 8024 "trace/trace-hw_net.h" } } } static inline void trace_e1000e_cfg_support_virtio(bool support) { if (true) { _nocheck__trace_e1000e_cfg_support_virtio(support); } } #define TRACE_IGB_WRITE_CONFIG_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_WRITE_CONFIG) || \ false) static inline void _nocheck__trace_igb_write_config(uint32_t address, uint32_t val, int len) { if (trace_event_get_state(TRACE_IGB_WRITE_CONFIG) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 264 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_write_config " "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , address, val, len); #line 8051 "trace/trace-hw_net.h" } else { #line 264 "../hw/net/trace-events" qemu_log("igb_write_config " "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 "\n", address, val, len); #line 8055 "trace/trace-hw_net.h" } } } static inline void trace_igb_write_config(uint32_t address, uint32_t val, int len) { if (true) { _nocheck__trace_igb_write_config(address, val, len); } } #define TRACE_IGBVF_WRITE_CONFIG_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGBVF_WRITE_CONFIG) || \ false) static inline void _nocheck__trace_igbvf_write_config(uint32_t address, uint32_t val, int len) { if (trace_event_get_state(TRACE_IGBVF_WRITE_CONFIG) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 265 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igbvf_write_config " "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , address, val, len); #line 8082 "trace/trace-hw_net.h" } else { #line 265 "../hw/net/trace-events" qemu_log("igbvf_write_config " "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 "\n", address, val, len); #line 8086 "trace/trace-hw_net.h" } } } static inline void trace_igbvf_write_config(uint32_t address, uint32_t val, int len) { if (true) { _nocheck__trace_igbvf_write_config(address, val, len); } } #define TRACE_IGB_CORE_MDIC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_CORE_MDIC_READ) || \ false) static inline void _nocheck__trace_igb_core_mdic_read(uint32_t addr, uint32_t data) { if (trace_event_get_state(TRACE_IGB_CORE_MDIC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 268 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_core_mdic_read " "MDIC READ: PHY[%u] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, data); #line 8113 "trace/trace-hw_net.h" } else { #line 268 "../hw/net/trace-events" qemu_log("igb_core_mdic_read " "MDIC READ: PHY[%u] = 0x%x" "\n", addr, data); #line 8117 "trace/trace-hw_net.h" } } } static inline void trace_igb_core_mdic_read(uint32_t addr, uint32_t data) { if (true) { _nocheck__trace_igb_core_mdic_read(addr, data); } } #define TRACE_IGB_CORE_MDIC_READ_UNHANDLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_CORE_MDIC_READ_UNHANDLED) || \ false) static inline void _nocheck__trace_igb_core_mdic_read_unhandled(uint32_t addr) { if (trace_event_get_state(TRACE_IGB_CORE_MDIC_READ_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 269 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_core_mdic_read_unhandled " "MDIC READ: PHY[%u] UNHANDLED" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 8144 "trace/trace-hw_net.h" } else { #line 269 "../hw/net/trace-events" qemu_log("igb_core_mdic_read_unhandled " "MDIC READ: PHY[%u] UNHANDLED" "\n", addr); #line 8148 "trace/trace-hw_net.h" } } } static inline void trace_igb_core_mdic_read_unhandled(uint32_t addr) { if (true) { _nocheck__trace_igb_core_mdic_read_unhandled(addr); } } #define TRACE_IGB_CORE_MDIC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_CORE_MDIC_WRITE) || \ false) static inline void _nocheck__trace_igb_core_mdic_write(uint32_t addr, uint32_t data) { if (trace_event_get_state(TRACE_IGB_CORE_MDIC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 270 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_core_mdic_write " "MDIC WRITE: PHY[%u] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, data); #line 8175 "trace/trace-hw_net.h" } else { #line 270 "../hw/net/trace-events" qemu_log("igb_core_mdic_write " "MDIC WRITE: PHY[%u] = 0x%x" "\n", addr, data); #line 8179 "trace/trace-hw_net.h" } } } static inline void trace_igb_core_mdic_write(uint32_t addr, uint32_t data) { if (true) { _nocheck__trace_igb_core_mdic_write(addr, data); } } #define TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED) || \ false) static inline void _nocheck__trace_igb_core_mdic_write_unhandled(uint32_t addr) { if (trace_event_get_state(TRACE_IGB_CORE_MDIC_WRITE_UNHANDLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 271 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_core_mdic_write_unhandled " "MDIC WRITE: PHY[%u] UNHANDLED" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 8206 "trace/trace-hw_net.h" } else { #line 271 "../hw/net/trace-events" qemu_log("igb_core_mdic_write_unhandled " "MDIC WRITE: PHY[%u] UNHANDLED" "\n", addr); #line 8210 "trace/trace-hw_net.h" } } } static inline void trace_igb_core_mdic_write_unhandled(uint32_t addr) { if (true) { _nocheck__trace_igb_core_mdic_write_unhandled(addr); } } #define TRACE_IGB_CORE_VF_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_CORE_VF_RESET) || \ false) static inline void _nocheck__trace_igb_core_vf_reset(uint16_t vfn) { if (trace_event_get_state(TRACE_IGB_CORE_VF_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 272 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_core_vf_reset " "VF%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vfn); #line 8237 "trace/trace-hw_net.h" } else { #line 272 "../hw/net/trace-events" qemu_log("igb_core_vf_reset " "VF%d" "\n", vfn); #line 8241 "trace/trace-hw_net.h" } } } static inline void trace_igb_core_vf_reset(uint16_t vfn) { if (true) { _nocheck__trace_igb_core_vf_reset(vfn); } } #define TRACE_IGB_LINK_SET_EXT_PARAMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_LINK_SET_EXT_PARAMS) || \ false) static inline void _nocheck__trace_igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) { if (trace_event_get_state(TRACE_IGB_LINK_SET_EXT_PARAMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 274 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_link_set_ext_params " "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , asd_check, speed_select_bypass, pfrstd); #line 8268 "trace/trace-hw_net.h" } else { #line 274 "../hw/net/trace-events" qemu_log("igb_link_set_ext_params " "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" "\n", asd_check, speed_select_bypass, pfrstd); #line 8272 "trace/trace-hw_net.h" } } } static inline void trace_igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) { if (true) { _nocheck__trace_igb_link_set_ext_params(asd_check, speed_select_bypass, pfrstd); } } #define TRACE_IGB_RX_DESC_BUFF_SIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_RX_DESC_BUFF_SIZE) || \ false) static inline void _nocheck__trace_igb_rx_desc_buff_size(uint32_t b) { if (trace_event_get_state(TRACE_IGB_RX_DESC_BUFF_SIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 276 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_rx_desc_buff_size " "buffer size: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b); #line 8299 "trace/trace-hw_net.h" } else { #line 276 "../hw/net/trace-events" qemu_log("igb_rx_desc_buff_size " "buffer size: %u" "\n", b); #line 8303 "trace/trace-hw_net.h" } } } static inline void trace_igb_rx_desc_buff_size(uint32_t b) { if (true) { _nocheck__trace_igb_rx_desc_buff_size(b); } } #define TRACE_IGB_RX_DESC_BUFF_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_RX_DESC_BUFF_WRITE) || \ false) static inline void _nocheck__trace_igb_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) { if (trace_event_get_state(TRACE_IGB_RX_DESC_BUFF_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 277 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_rx_desc_buff_write " "buffer %u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, addr, offset, source, len); #line 8330 "trace/trace-hw_net.h" } else { #line 277 "../hw/net/trace-events" qemu_log("igb_rx_desc_buff_write " "buffer %u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" "\n", idx, addr, offset, source, len); #line 8334 "trace/trace-hw_net.h" } } } static inline void trace_igb_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) { if (true) { _nocheck__trace_igb_rx_desc_buff_write(idx, addr, offset, source, len); } } #define TRACE_IGB_RX_METADATA_RSS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_RX_METADATA_RSS) || \ false) static inline void _nocheck__trace_igb_rx_metadata_rss(uint32_t rss, uint16_t rss_pkt_type) { if (trace_event_get_state(TRACE_IGB_RX_METADATA_RSS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 279 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_rx_metadata_rss " "RSS data: rss: 0x%X, rss_pkt_type: 0x%X" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rss, rss_pkt_type); #line 8361 "trace/trace-hw_net.h" } else { #line 279 "../hw/net/trace-events" qemu_log("igb_rx_metadata_rss " "RSS data: rss: 0x%X, rss_pkt_type: 0x%X" "\n", rss, rss_pkt_type); #line 8365 "trace/trace-hw_net.h" } } } static inline void trace_igb_rx_metadata_rss(uint32_t rss, uint16_t rss_pkt_type) { if (true) { _nocheck__trace_igb_rx_metadata_rss(rss, rss_pkt_type); } } #define TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR) || \ false) static inline void _nocheck__trace_igb_irq_icr_clear_gpie_nsicr(void) { if (trace_event_get_state(TRACE_IGB_IRQ_ICR_CLEAR_GPIE_NSICR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 281 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_icr_clear_gpie_nsicr " "Clearing ICR on read due to GPIE.NSICR enabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 8392 "trace/trace-hw_net.h" } else { #line 281 "../hw/net/trace-events" qemu_log("igb_irq_icr_clear_gpie_nsicr " "Clearing ICR on read due to GPIE.NSICR enabled" "\n"); #line 8396 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_icr_clear_gpie_nsicr(void) { if (true) { _nocheck__trace_igb_irq_icr_clear_gpie_nsicr(); } } #define TRACE_IGB_IRQ_SET_IAM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_SET_IAM) || \ false) static inline void _nocheck__trace_igb_irq_set_iam(uint32_t icr) { if (trace_event_get_state(TRACE_IGB_IRQ_SET_IAM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 282 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_set_iam " "Update IAM: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , icr); #line 8423 "trace/trace-hw_net.h" } else { #line 282 "../hw/net/trace-events" qemu_log("igb_irq_set_iam " "Update IAM: 0x%x" "\n", icr); #line 8427 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_set_iam(uint32_t icr) { if (true) { _nocheck__trace_igb_irq_set_iam(icr); } } #define TRACE_IGB_IRQ_READ_IAM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_READ_IAM) || \ false) static inline void _nocheck__trace_igb_irq_read_iam(uint32_t icr) { if (trace_event_get_state(TRACE_IGB_IRQ_READ_IAM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 283 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_read_iam " "Current IAM: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , icr); #line 8454 "trace/trace-hw_net.h" } else { #line 283 "../hw/net/trace-events" qemu_log("igb_irq_read_iam " "Current IAM: 0x%x" "\n", icr); #line 8458 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_read_iam(uint32_t icr) { if (true) { _nocheck__trace_igb_irq_read_iam(icr); } } #define TRACE_IGB_IRQ_WRITE_EICS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EICS) || \ false) static inline void _nocheck__trace_igb_irq_write_eics(uint32_t val, bool msix) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EICS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 284 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eics " "Update EICS: 0x%x MSI-X: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, msix); #line 8485 "trace/trace-hw_net.h" } else { #line 284 "../hw/net/trace-events" qemu_log("igb_irq_write_eics " "Update EICS: 0x%x MSI-X: %d" "\n", val, msix); #line 8489 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eics(uint32_t val, bool msix) { if (true) { _nocheck__trace_igb_irq_write_eics(val, msix); } } #define TRACE_IGB_IRQ_WRITE_EIMS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EIMS) || \ false) static inline void _nocheck__trace_igb_irq_write_eims(uint32_t val, bool msix) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EIMS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 285 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eims " "Update EIMS: 0x%x MSI-X: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, msix); #line 8516 "trace/trace-hw_net.h" } else { #line 285 "../hw/net/trace-events" qemu_log("igb_irq_write_eims " "Update EIMS: 0x%x MSI-X: %d" "\n", val, msix); #line 8520 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eims(uint32_t val, bool msix) { if (true) { _nocheck__trace_igb_irq_write_eims(val, msix); } } #define TRACE_IGB_IRQ_WRITE_EIMC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EIMC) || \ false) static inline void _nocheck__trace_igb_irq_write_eimc(uint32_t val, bool msix) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EIMC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 286 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eimc " "Update EIMC: 0x%x MSI-X: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, msix); #line 8547 "trace/trace-hw_net.h" } else { #line 286 "../hw/net/trace-events" qemu_log("igb_irq_write_eimc " "Update EIMC: 0x%x MSI-X: %d" "\n", val, msix); #line 8551 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eimc(uint32_t val, bool msix) { if (true) { _nocheck__trace_igb_irq_write_eimc(val, msix); } } #define TRACE_IGB_IRQ_WRITE_EIAC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EIAC) || \ false) static inline void _nocheck__trace_igb_irq_write_eiac(uint32_t val) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EIAC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 287 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eiac " "Update EIAC: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 8578 "trace/trace-hw_net.h" } else { #line 287 "../hw/net/trace-events" qemu_log("igb_irq_write_eiac " "Update EIAC: 0x%x" "\n", val); #line 8582 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eiac(uint32_t val) { if (true) { _nocheck__trace_igb_irq_write_eiac(val); } } #define TRACE_IGB_IRQ_WRITE_EIAM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EIAM) || \ false) static inline void _nocheck__trace_igb_irq_write_eiam(uint32_t val, bool msix) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EIAM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 288 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eiam " "Update EIAM: 0x%x MSI-X: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, msix); #line 8609 "trace/trace-hw_net.h" } else { #line 288 "../hw/net/trace-events" qemu_log("igb_irq_write_eiam " "Update EIAM: 0x%x MSI-X: %d" "\n", val, msix); #line 8613 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eiam(uint32_t val, bool msix) { if (true) { _nocheck__trace_igb_irq_write_eiam(val, msix); } } #define TRACE_IGB_IRQ_WRITE_EICR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_WRITE_EICR) || \ false) static inline void _nocheck__trace_igb_irq_write_eicr(uint32_t val, bool msix) { if (trace_event_get_state(TRACE_IGB_IRQ_WRITE_EICR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 289 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_write_eicr " "Update EICR: 0x%x MSI-X: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, msix); #line 8640 "trace/trace-hw_net.h" } else { #line 289 "../hw/net/trace-events" qemu_log("igb_irq_write_eicr " "Update EICR: 0x%x MSI-X: %d" "\n", val, msix); #line 8644 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_write_eicr(uint32_t val, bool msix) { if (true) { _nocheck__trace_igb_irq_write_eicr(val, msix); } } #define TRACE_IGB_IRQ_EITR_SET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_IRQ_EITR_SET) || \ false) static inline void _nocheck__trace_igb_irq_eitr_set(uint32_t eitr_num, uint32_t val) { if (trace_event_get_state(TRACE_IGB_IRQ_EITR_SET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 290 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_irq_eitr_set " "EITR[%u] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , eitr_num, val); #line 8671 "trace/trace-hw_net.h" } else { #line 290 "../hw/net/trace-events" qemu_log("igb_irq_eitr_set " "EITR[%u] = 0x%x" "\n", eitr_num, val); #line 8675 "trace/trace-hw_net.h" } } } static inline void trace_igb_irq_eitr_set(uint32_t eitr_num, uint32_t val) { if (true) { _nocheck__trace_igb_irq_eitr_set(eitr_num, val); } } #define TRACE_IGB_SET_PFMAILBOX_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_SET_PFMAILBOX) || \ false) static inline void _nocheck__trace_igb_set_pfmailbox(uint32_t vf_num, uint32_t val) { if (trace_event_get_state(TRACE_IGB_SET_PFMAILBOX) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 291 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_set_pfmailbox " "PFMailbox[%d]: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vf_num, val); #line 8702 "trace/trace-hw_net.h" } else { #line 291 "../hw/net/trace-events" qemu_log("igb_set_pfmailbox " "PFMailbox[%d]: 0x%x" "\n", vf_num, val); #line 8706 "trace/trace-hw_net.h" } } } static inline void trace_igb_set_pfmailbox(uint32_t vf_num, uint32_t val) { if (true) { _nocheck__trace_igb_set_pfmailbox(vf_num, val); } } #define TRACE_IGB_SET_VFMAILBOX_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_SET_VFMAILBOX) || \ false) static inline void _nocheck__trace_igb_set_vfmailbox(uint32_t vf_num, uint32_t val) { if (trace_event_get_state(TRACE_IGB_SET_VFMAILBOX) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 292 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_set_vfmailbox " "VFMailbox[%d]: 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , vf_num, val); #line 8733 "trace/trace-hw_net.h" } else { #line 292 "../hw/net/trace-events" qemu_log("igb_set_vfmailbox " "VFMailbox[%d]: 0x%x" "\n", vf_num, val); #line 8737 "trace/trace-hw_net.h" } } } static inline void trace_igb_set_vfmailbox(uint32_t vf_num, uint32_t val) { if (true) { _nocheck__trace_igb_set_vfmailbox(vf_num, val); } } #define TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP) || \ false) static inline void _nocheck__trace_igb_wrn_rx_desc_modes_not_supp(int desc_type) { if (trace_event_get_state(TRACE_IGB_WRN_RX_DESC_MODES_NOT_SUPP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 294 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igb_wrn_rx_desc_modes_not_supp " "Not supported descriptor type: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , desc_type); #line 8764 "trace/trace-hw_net.h" } else { #line 294 "../hw/net/trace-events" qemu_log("igb_wrn_rx_desc_modes_not_supp " "Not supported descriptor type: %d" "\n", desc_type); #line 8768 "trace/trace-hw_net.h" } } } static inline void trace_igb_wrn_rx_desc_modes_not_supp(int desc_type) { if (true) { _nocheck__trace_igb_wrn_rx_desc_modes_not_supp(desc_type); } } #define TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN) || \ false) static inline void _nocheck__trace_igbvf_wrn_io_addr_unknown(uint64_t addr) { if (trace_event_get_state(TRACE_IGBVF_WRN_IO_ADDR_UNKNOWN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 297 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:igbvf_wrn_io_addr_unknown " "IO unknown register 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 8795 "trace/trace-hw_net.h" } else { #line 297 "../hw/net/trace-events" qemu_log("igbvf_wrn_io_addr_unknown " "IO unknown register 0x%"PRIx64 "\n", addr); #line 8799 "trace/trace-hw_net.h" } } } static inline void trace_igbvf_wrn_io_addr_unknown(uint64_t addr) { if (true) { _nocheck__trace_igbvf_wrn_io_addr_unknown(addr); } } #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND) || \ false) static inline void _nocheck__trace_spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) { if (trace_event_get_state(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_POOL_FOUND) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 300 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_get_rx_bd_from_pool_found " "pool=%d count=%"PRId32" rxbufs=%"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pool, count, rx_bufs); #line 8826 "trace/trace-hw_net.h" } else { #line 300 "../hw/net/trace-events" qemu_log("spapr_vlan_get_rx_bd_from_pool_found " "pool=%d count=%"PRId32" rxbufs=%"PRIu32 "\n", pool, count, rx_bufs); #line 8830 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) { if (true) { _nocheck__trace_spapr_vlan_get_rx_bd_from_pool_found(pool, count, rx_bufs); } } #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE) || \ false) static inline void _nocheck__trace_spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) { if (trace_event_get_state(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 301 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_get_rx_bd_from_page " "use_buf_ptr=%d bd=0x%016"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , buf_ptr, bd); #line 8857 "trace/trace-hw_net.h" } else { #line 301 "../hw/net/trace-events" qemu_log("spapr_vlan_get_rx_bd_from_page " "use_buf_ptr=%d bd=0x%016"PRIx64 "\n", buf_ptr, bd); #line 8861 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) { if (true) { _nocheck__trace_spapr_vlan_get_rx_bd_from_page(buf_ptr, bd); } } #define TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND) || \ false) static inline void _nocheck__trace_spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) { if (trace_event_get_state(TRACE_SPAPR_VLAN_GET_RX_BD_FROM_PAGE_FOUND) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 302 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_get_rx_bd_from_page_found " "ptr=%"PRIu32" rxbufs=%"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , use_buf_ptr, rx_bufs); #line 8888 "trace/trace-hw_net.h" } else { #line 302 "../hw/net/trace-events" qemu_log("spapr_vlan_get_rx_bd_from_page_found " "ptr=%"PRIu32" rxbufs=%"PRIu32 "\n", use_buf_ptr, rx_bufs); #line 8892 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) { if (true) { _nocheck__trace_spapr_vlan_get_rx_bd_from_page_found(use_buf_ptr, rx_bufs); } } #define TRACE_SPAPR_VLAN_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_RECEIVE) || \ false) static inline void _nocheck__trace_spapr_vlan_receive(const char * id, uint32_t rx_bufs) { if (trace_event_get_state(TRACE_SPAPR_VLAN_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 303 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_receive " "[%s] rx_bufs=%"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , id, rx_bufs); #line 8919 "trace/trace-hw_net.h" } else { #line 303 "../hw/net/trace-events" qemu_log("spapr_vlan_receive " "[%s] rx_bufs=%"PRIu32 "\n", id, rx_bufs); #line 8923 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_receive(const char * id, uint32_t rx_bufs) { if (true) { _nocheck__trace_spapr_vlan_receive(id, rx_bufs); } } #define TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED) || \ false) static inline void _nocheck__trace_spapr_vlan_receive_dma_completed(void) { if (trace_event_get_state(TRACE_SPAPR_VLAN_RECEIVE_DMA_COMPLETED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 304 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_receive_dma_completed " "DMA write completed" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 8950 "trace/trace-hw_net.h" } else { #line 304 "../hw/net/trace-events" qemu_log("spapr_vlan_receive_dma_completed " "DMA write completed" "\n"); #line 8954 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_receive_dma_completed(void) { if (true) { _nocheck__trace_spapr_vlan_receive_dma_completed(); } } #define TRACE_SPAPR_VLAN_RECEIVE_WROTE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_RECEIVE_WROTE) || \ false) static inline void _nocheck__trace_spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) { if (trace_event_get_state(TRACE_SPAPR_VLAN_RECEIVE_WROTE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 305 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_receive_wrote " "rxq entry (ptr=0x%"PRIx64"): 0x%016"PRIx64" 0x%016"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ptr, hi, lo); #line 8981 "trace/trace-hw_net.h" } else { #line 305 "../hw/net/trace-events" qemu_log("spapr_vlan_receive_wrote " "rxq entry (ptr=0x%"PRIx64"): 0x%016"PRIx64" 0x%016"PRIx64 "\n", ptr, hi, lo); #line 8985 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) { if (true) { _nocheck__trace_spapr_vlan_receive_wrote(ptr, hi, lo); } } #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE) || \ false) static inline void _nocheck__trace_spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) { if (trace_event_get_state(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_CREATE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 306 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_add_rxbuf_to_pool_create " "created RX pool %d for size %"PRIu64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pool, len); #line 9012 "trace/trace-hw_net.h" } else { #line 306 "../hw/net/trace-events" qemu_log("spapr_vlan_add_rxbuf_to_pool_create " "created RX pool %d for size %"PRIu64 "\n", pool, len); #line 9016 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) { if (true) { _nocheck__trace_spapr_vlan_add_rxbuf_to_pool_create(pool, len); } } #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL) || \ false) static inline void _nocheck__trace_spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) { if (trace_event_get_state(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_POOL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 307 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_add_rxbuf_to_pool " "add buf using pool %d (size %"PRIu64", count=%"PRId32")" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pool, len, count); #line 9043 "trace/trace-hw_net.h" } else { #line 307 "../hw/net/trace-events" qemu_log("spapr_vlan_add_rxbuf_to_pool " "add buf using pool %d (size %"PRIu64", count=%"PRId32")" "\n", pool, len, count); #line 9047 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) { if (true) { _nocheck__trace_spapr_vlan_add_rxbuf_to_pool(pool, len, count); } } #define TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE) || \ false) static inline void _nocheck__trace_spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) { if (trace_event_get_state(TRACE_SPAPR_VLAN_ADD_RXBUF_TO_PAGE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 308 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_add_rxbuf_to_page " "added buf ptr=%"PRIu32" rx_bufs=%"PRIu32" bd=0x%016"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ptr, rx_bufs, bd); #line 9074 "trace/trace-hw_net.h" } else { #line 308 "../hw/net/trace-events" qemu_log("spapr_vlan_add_rxbuf_to_page " "added buf ptr=%"PRIu32" rx_bufs=%"PRIu32" bd=0x%016"PRIx64 "\n", ptr, rx_bufs, bd); #line 9078 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) { if (true) { _nocheck__trace_spapr_vlan_add_rxbuf_to_page(ptr, rx_bufs, bd); } } #define TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER) || \ false) static inline void _nocheck__trace_spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) { if (trace_event_get_state(TRACE_SPAPR_VLAN_H_ADD_LOGICAL_LAN_BUFFER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 309 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_h_add_logical_lan_buffer " "H_ADD_LOGICAL_LAN_BUFFER(0x%"PRIx64", 0x%"PRIx64")" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, buf); #line 9105 "trace/trace-hw_net.h" } else { #line 309 "../hw/net/trace-events" qemu_log("spapr_vlan_h_add_logical_lan_buffer " "H_ADD_LOGICAL_LAN_BUFFER(0x%"PRIx64", 0x%"PRIx64")" "\n", reg, buf); #line 9109 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) { if (true) { _nocheck__trace_spapr_vlan_h_add_logical_lan_buffer(reg, buf); } } #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN) || \ false) static inline void _nocheck__trace_spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) { if (trace_event_get_state(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 310 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_h_send_logical_lan " "H_SEND_LOGICAL_LAN(0x%"PRIx64", , 0x%"PRIx64")" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, continue_token); #line 9136 "trace/trace-hw_net.h" } else { #line 310 "../hw/net/trace-events" qemu_log("spapr_vlan_h_send_logical_lan " "H_SEND_LOGICAL_LAN(0x%"PRIx64", , 0x%"PRIx64")" "\n", reg, continue_token); #line 9140 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) { if (true) { _nocheck__trace_spapr_vlan_h_send_logical_lan(reg, continue_token); } } #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS) || \ false) static inline void _nocheck__trace_spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) { if (trace_event_get_state(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_RXBUFS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 311 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_h_send_logical_lan_rxbufs " "rxbufs = %"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , rx_bufs); #line 9167 "trace/trace-hw_net.h" } else { #line 311 "../hw/net/trace-events" qemu_log("spapr_vlan_h_send_logical_lan_rxbufs " "rxbufs = %"PRIu32 "\n", rx_bufs); #line 9171 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) { if (true) { _nocheck__trace_spapr_vlan_h_send_logical_lan_rxbufs(rx_bufs); } } #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC) || \ false) static inline void _nocheck__trace_spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) { if (trace_event_get_state(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_BUF_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 312 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_h_send_logical_lan_buf_desc " " buf desc: 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , buf); #line 9198 "trace/trace-hw_net.h" } else { #line 312 "../hw/net/trace-events" qemu_log("spapr_vlan_h_send_logical_lan_buf_desc " " buf desc: 0x%"PRIx64 "\n", buf); #line 9202 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) { if (true) { _nocheck__trace_spapr_vlan_h_send_logical_lan_buf_desc(buf); } } #define TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL) || \ false) static inline void _nocheck__trace_spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) { if (trace_event_get_state(TRACE_SPAPR_VLAN_H_SEND_LOGICAL_LAN_TOTAL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 313 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:spapr_vlan_h_send_logical_lan_total " "%d buffers, total length 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nbufs, total_len); #line 9229 "trace/trace-hw_net.h" } else { #line 313 "../hw/net/trace-events" qemu_log("spapr_vlan_h_send_logical_lan_total " "%d buffers, total length 0x%x" "\n", nbufs, total_len); #line 9233 "trace/trace-hw_net.h" } } } static inline void trace_spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) { if (true) { _nocheck__trace_spapr_vlan_h_send_logical_lan_total(nbufs, total_len); } } #define TRACE_SUNGEM_TX_CHECKSUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_CHECKSUM) || \ false) static inline void _nocheck__trace_sungem_tx_checksum(uint16_t start, uint16_t off) { if (trace_event_get_state(TRACE_SUNGEM_TX_CHECKSUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 316 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_checksum " "TX checksumming from byte %d, inserting at %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , start, off); #line 9260 "trace/trace-hw_net.h" } else { #line 316 "../hw/net/trace-events" qemu_log("sungem_tx_checksum " "TX checksumming from byte %d, inserting at %d" "\n", start, off); #line 9264 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_checksum(uint16_t start, uint16_t off) { if (true) { _nocheck__trace_sungem_tx_checksum(start, off); } } #define TRACE_SUNGEM_TX_CHECKSUM_OOB_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_CHECKSUM_OOB) || \ false) static inline void _nocheck__trace_sungem_tx_checksum_oob(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_CHECKSUM_OOB) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 317 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_checksum_oob " "TX checksum out of packet bounds" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9291 "trace/trace-hw_net.h" } else { #line 317 "../hw/net/trace-events" qemu_log("sungem_tx_checksum_oob " "TX checksum out of packet bounds" "\n"); #line 9295 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_checksum_oob(void) { if (true) { _nocheck__trace_sungem_tx_checksum_oob(); } } #define TRACE_SUNGEM_TX_UNFINISHED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_UNFINISHED) || \ false) static inline void _nocheck__trace_sungem_tx_unfinished(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_UNFINISHED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 318 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_unfinished " "TX packet started without finishing the previous one" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9322 "trace/trace-hw_net.h" } else { #line 318 "../hw/net/trace-events" qemu_log("sungem_tx_unfinished " "TX packet started without finishing the previous one" "\n"); #line 9326 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_unfinished(void) { if (true) { _nocheck__trace_sungem_tx_unfinished(); } } #define TRACE_SUNGEM_TX_OVERFLOW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_OVERFLOW) || \ false) static inline void _nocheck__trace_sungem_tx_overflow(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_OVERFLOW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 319 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_overflow " "TX packet queue overflow" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9353 "trace/trace-hw_net.h" } else { #line 319 "../hw/net/trace-events" qemu_log("sungem_tx_overflow " "TX packet queue overflow" "\n"); #line 9357 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_overflow(void) { if (true) { _nocheck__trace_sungem_tx_overflow(); } } #define TRACE_SUNGEM_TX_FINISHED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_FINISHED) || \ false) static inline void _nocheck__trace_sungem_tx_finished(uint32_t size) { if (trace_event_get_state(TRACE_SUNGEM_TX_FINISHED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 320 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_finished " "TX completing %"PRIu32 " bytes packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 9384 "trace/trace-hw_net.h" } else { #line 320 "../hw/net/trace-events" qemu_log("sungem_tx_finished " "TX completing %"PRIu32 " bytes packet" "\n", size); #line 9388 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_finished(uint32_t size) { if (true) { _nocheck__trace_sungem_tx_finished(size); } } #define TRACE_SUNGEM_TX_KICK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_KICK) || \ false) static inline void _nocheck__trace_sungem_tx_kick(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_KICK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 321 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_kick " "TX Kick..." "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9415 "trace/trace-hw_net.h" } else { #line 321 "../hw/net/trace-events" qemu_log("sungem_tx_kick " "TX Kick..." "\n"); #line 9419 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_kick(void) { if (true) { _nocheck__trace_sungem_tx_kick(); } } #define TRACE_SUNGEM_TX_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_DISABLED) || \ false) static inline void _nocheck__trace_sungem_tx_disabled(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 322 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_disabled " "TX not enabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9446 "trace/trace-hw_net.h" } else { #line 322 "../hw/net/trace-events" qemu_log("sungem_tx_disabled " "TX not enabled" "\n"); #line 9450 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_disabled(void) { if (true) { _nocheck__trace_sungem_tx_disabled(); } } #define TRACE_SUNGEM_TX_PROCESS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_PROCESS) || \ false) static inline void _nocheck__trace_sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) { if (trace_event_get_state(TRACE_SUNGEM_TX_PROCESS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 323 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_process " "TX processing comp=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , comp, kick, size); #line 9477 "trace/trace-hw_net.h" } else { #line 323 "../hw/net/trace-events" qemu_log("sungem_tx_process " "TX processing comp=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 "\n", comp, kick, size); #line 9481 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) { if (true) { _nocheck__trace_sungem_tx_process(comp, kick, size); } } #define TRACE_SUNGEM_TX_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_DESC) || \ false) static inline void _nocheck__trace_sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) { if (trace_event_get_state(TRACE_SUNGEM_TX_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 324 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_desc " "TX desc %"PRIu32 ": 0x%"PRIx64" 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , comp, control, buffer); #line 9508 "trace/trace-hw_net.h" } else { #line 324 "../hw/net/trace-events" qemu_log("sungem_tx_desc " "TX desc %"PRIu32 ": 0x%"PRIx64" 0x%"PRIx64 "\n", comp, control, buffer); #line 9512 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) { if (true) { _nocheck__trace_sungem_tx_desc(comp, control, buffer); } } #define TRACE_SUNGEM_TX_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_TX_RESET) || \ false) static inline void _nocheck__trace_sungem_tx_reset(void) { if (trace_event_get_state(TRACE_SUNGEM_TX_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 325 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_tx_reset " "TX reset" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9539 "trace/trace-hw_net.h" } else { #line 325 "../hw/net/trace-events" qemu_log("sungem_tx_reset " "TX reset" "\n"); #line 9543 "trace/trace-hw_net.h" } } } static inline void trace_sungem_tx_reset(void) { if (true) { _nocheck__trace_sungem_tx_reset(); } } #define TRACE_SUNGEM_RX_MAC_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_MAC_DISABLED) || \ false) static inline void _nocheck__trace_sungem_rx_mac_disabled(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_MAC_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 326 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_mac_disabled " "Check RX MAC disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9570 "trace/trace-hw_net.h" } else { #line 326 "../hw/net/trace-events" qemu_log("sungem_rx_mac_disabled " "Check RX MAC disabled" "\n"); #line 9574 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_mac_disabled(void) { if (true) { _nocheck__trace_sungem_rx_mac_disabled(); } } #define TRACE_SUNGEM_RX_TXDMA_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_TXDMA_DISABLED) || \ false) static inline void _nocheck__trace_sungem_rx_txdma_disabled(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_TXDMA_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 327 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_txdma_disabled " "Check RX TXDMA disabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9601 "trace/trace-hw_net.h" } else { #line 327 "../hw/net/trace-events" qemu_log("sungem_rx_txdma_disabled " "Check RX TXDMA disabled" "\n"); #line 9605 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_txdma_disabled(void) { if (true) { _nocheck__trace_sungem_rx_txdma_disabled(); } } #define TRACE_SUNGEM_RX_CHECK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_CHECK) || \ false) static inline void _nocheck__trace_sungem_rx_check(bool full, uint32_t kick, uint32_t done) { if (trace_event_get_state(TRACE_SUNGEM_RX_CHECK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 328 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_check " "Check RX %d (kick=%"PRIu32", done=%"PRIu32")" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , full, kick, done); #line 9632 "trace/trace-hw_net.h" } else { #line 328 "../hw/net/trace-events" qemu_log("sungem_rx_check " "Check RX %d (kick=%"PRIu32", done=%"PRIu32")" "\n", full, kick, done); #line 9636 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_check(bool full, uint32_t kick, uint32_t done) { if (true) { _nocheck__trace_sungem_rx_check(full, kick, done); } } #define TRACE_SUNGEM_RX_MAC_CHECK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_MAC_CHECK) || \ false) static inline void _nocheck__trace_sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) { if (trace_event_get_state(TRACE_SUNGEM_RX_MAC_CHECK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 329 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_mac_check " "Word MAC: 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , mac0, mac1, mac2); #line 9663 "trace/trace-hw_net.h" } else { #line 329 "../hw/net/trace-events" qemu_log("sungem_rx_mac_check " "Word MAC: 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32 "\n", mac0, mac1, mac2); #line 9667 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) { if (true) { _nocheck__trace_sungem_rx_mac_check(mac0, mac1, mac2); } } #define TRACE_SUNGEM_RX_MAC_MULTICAST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_MAC_MULTICAST) || \ false) static inline void _nocheck__trace_sungem_rx_mac_multicast(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_MAC_MULTICAST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 330 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_mac_multicast " "Multicast" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9694 "trace/trace-hw_net.h" } else { #line 330 "../hw/net/trace-events" qemu_log("sungem_rx_mac_multicast " "Multicast" "\n"); #line 9698 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_mac_multicast(void) { if (true) { _nocheck__trace_sungem_rx_mac_multicast(); } } #define TRACE_SUNGEM_RX_MAC_COMPARE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_MAC_COMPARE) || \ false) static inline void _nocheck__trace_sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) { if (trace_event_get_state(TRACE_SUNGEM_RX_MAC_COMPARE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 331 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_mac_compare " "Compare MAC to 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32".." "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , mac0, mac1, mac2); #line 9725 "trace/trace-hw_net.h" } else { #line 331 "../hw/net/trace-events" qemu_log("sungem_rx_mac_compare " "Compare MAC to 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32".." "\n", mac0, mac1, mac2); #line 9729 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) { if (true) { _nocheck__trace_sungem_rx_mac_compare(mac0, mac1, mac2); } } #define TRACE_SUNGEM_RX_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_PACKET) || \ false) static inline void _nocheck__trace_sungem_rx_packet(size_t size) { if (trace_event_get_state(TRACE_SUNGEM_RX_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 332 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_packet " "RX got %zu bytes packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 9756 "trace/trace-hw_net.h" } else { #line 332 "../hw/net/trace-events" qemu_log("sungem_rx_packet " "RX got %zu bytes packet" "\n", size); #line 9760 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_packet(size_t size) { if (true) { _nocheck__trace_sungem_rx_packet(size); } } #define TRACE_SUNGEM_RX_DISABLED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_DISABLED) || \ false) static inline void _nocheck__trace_sungem_rx_disabled(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_DISABLED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 333 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_disabled " "RX not enabled" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9787 "trace/trace-hw_net.h" } else { #line 333 "../hw/net/trace-events" qemu_log("sungem_rx_disabled " "RX not enabled" "\n"); #line 9791 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_disabled(void) { if (true) { _nocheck__trace_sungem_rx_disabled(); } } #define TRACE_SUNGEM_RX_BAD_FRAME_SIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_BAD_FRAME_SIZE) || \ false) static inline void _nocheck__trace_sungem_rx_bad_frame_size(size_t size) { if (trace_event_get_state(TRACE_SUNGEM_RX_BAD_FRAME_SIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 334 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_bad_frame_size " "RX bad frame size %zu, dropped" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 9818 "trace/trace-hw_net.h" } else { #line 334 "../hw/net/trace-events" qemu_log("sungem_rx_bad_frame_size " "RX bad frame size %zu, dropped" "\n", size); #line 9822 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_bad_frame_size(size_t size) { if (true) { _nocheck__trace_sungem_rx_bad_frame_size(size); } } #define TRACE_SUNGEM_RX_UNMATCHED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_UNMATCHED) || \ false) static inline void _nocheck__trace_sungem_rx_unmatched(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_UNMATCHED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 335 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_unmatched " "No match, dropped" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9849 "trace/trace-hw_net.h" } else { #line 335 "../hw/net/trace-events" qemu_log("sungem_rx_unmatched " "No match, dropped" "\n"); #line 9853 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_unmatched(void) { if (true) { _nocheck__trace_sungem_rx_unmatched(); } } #define TRACE_SUNGEM_RX_PROCESS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_PROCESS) || \ false) static inline void _nocheck__trace_sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) { if (trace_event_get_state(TRACE_SUNGEM_RX_PROCESS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 336 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_process " "RX processing done=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , done, kick, size); #line 9880 "trace/trace-hw_net.h" } else { #line 336 "../hw/net/trace-events" qemu_log("sungem_rx_process " "RX processing done=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 "\n", done, kick, size); #line 9884 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) { if (true) { _nocheck__trace_sungem_rx_process(done, kick, size); } } #define TRACE_SUNGEM_RX_RINGFULL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_RINGFULL) || \ false) static inline void _nocheck__trace_sungem_rx_ringfull(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_RINGFULL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 337 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_ringfull " "RX ring full" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9911 "trace/trace-hw_net.h" } else { #line 337 "../hw/net/trace-events" qemu_log("sungem_rx_ringfull " "RX ring full" "\n"); #line 9915 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_ringfull(void) { if (true) { _nocheck__trace_sungem_rx_ringfull(); } } #define TRACE_SUNGEM_RX_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_DESC) || \ false) static inline void _nocheck__trace_sungem_rx_desc(uint64_t control, uint64_t buffer) { if (trace_event_get_state(TRACE_SUNGEM_RX_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 338 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_desc " "RX desc: 0x%"PRIx64" 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , control, buffer); #line 9942 "trace/trace-hw_net.h" } else { #line 338 "../hw/net/trace-events" qemu_log("sungem_rx_desc " "RX desc: 0x%"PRIx64" 0x%"PRIx64 "\n", control, buffer); #line 9946 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_desc(uint64_t control, uint64_t buffer) { if (true) { _nocheck__trace_sungem_rx_desc(control, buffer); } } #define TRACE_SUNGEM_RX_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_RESET) || \ false) static inline void _nocheck__trace_sungem_rx_reset(void) { if (trace_event_get_state(TRACE_SUNGEM_RX_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 339 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_reset " "RX reset" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 9973 "trace/trace-hw_net.h" } else { #line 339 "../hw/net/trace-events" qemu_log("sungem_rx_reset " "RX reset" "\n"); #line 9977 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_reset(void) { if (true) { _nocheck__trace_sungem_rx_reset(); } } #define TRACE_SUNGEM_RX_KICK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RX_KICK) || \ false) static inline void _nocheck__trace_sungem_rx_kick(uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_RX_KICK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 340 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_rx_kick " "RXDMA_KICK written to %"PRIu64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 10004 "trace/trace-hw_net.h" } else { #line 340 "../hw/net/trace-events" qemu_log("sungem_rx_kick " "RXDMA_KICK written to %"PRIu64 "\n", val); #line 10008 "trace/trace-hw_net.h" } } } static inline void trace_sungem_rx_kick(uint64_t val) { if (true) { _nocheck__trace_sungem_rx_kick(val); } } #define TRACE_SUNGEM_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_RESET) || \ false) static inline void _nocheck__trace_sungem_reset(bool pci_reset) { if (trace_event_get_state(TRACE_SUNGEM_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 341 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_reset " "Full reset (PCI:%d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , pci_reset); #line 10035 "trace/trace-hw_net.h" } else { #line 341 "../hw/net/trace-events" qemu_log("sungem_reset " "Full reset (PCI:%d)" "\n", pci_reset); #line 10039 "trace/trace-hw_net.h" } } } static inline void trace_sungem_reset(bool pci_reset) { if (true) { _nocheck__trace_sungem_reset(pci_reset); } } #define TRACE_SUNGEM_MII_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MII_WRITE) || \ false) static inline void _nocheck__trace_sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) { if (trace_event_get_state(TRACE_SUNGEM_MII_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 342 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mii_write " "MII write addr 0x%x reg 0x%02x val 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy_addr, reg_addr, val); #line 10066 "trace/trace-hw_net.h" } else { #line 342 "../hw/net/trace-events" qemu_log("sungem_mii_write " "MII write addr 0x%x reg 0x%02x val 0x%04x" "\n", phy_addr, reg_addr, val); #line 10070 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) { if (true) { _nocheck__trace_sungem_mii_write(phy_addr, reg_addr, val); } } #define TRACE_SUNGEM_MII_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MII_READ) || \ false) static inline void _nocheck__trace_sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) { if (trace_event_get_state(TRACE_SUNGEM_MII_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 343 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mii_read " "MII read addr 0x%x reg 0x%02x val 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy_addr, reg_addr, val); #line 10097 "trace/trace-hw_net.h" } else { #line 343 "../hw/net/trace-events" qemu_log("sungem_mii_read " "MII read addr 0x%x reg 0x%02x val 0x%04x" "\n", phy_addr, reg_addr, val); #line 10101 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) { if (true) { _nocheck__trace_sungem_mii_read(phy_addr, reg_addr, val); } } #define TRACE_SUNGEM_MII_INVALID_SOF_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MII_INVALID_SOF) || \ false) static inline void _nocheck__trace_sungem_mii_invalid_sof(uint32_t val) { if (trace_event_get_state(TRACE_SUNGEM_MII_INVALID_SOF) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 344 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mii_invalid_sof " "MII op, invalid SOF field 0x%"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val); #line 10128 "trace/trace-hw_net.h" } else { #line 344 "../hw/net/trace-events" qemu_log("sungem_mii_invalid_sof " "MII op, invalid SOF field 0x%"PRIx32 "\n", val); #line 10132 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mii_invalid_sof(uint32_t val) { if (true) { _nocheck__trace_sungem_mii_invalid_sof(val); } } #define TRACE_SUNGEM_MII_INVALID_OP_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MII_INVALID_OP) || \ false) static inline void _nocheck__trace_sungem_mii_invalid_op(uint8_t op) { if (trace_event_get_state(TRACE_SUNGEM_MII_INVALID_OP) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 345 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mii_invalid_op " "MII op, invalid op field 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , op); #line 10159 "trace/trace-hw_net.h" } else { #line 345 "../hw/net/trace-events" qemu_log("sungem_mii_invalid_op " "MII op, invalid op field 0x%x" "\n", op); #line 10163 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mii_invalid_op(uint8_t op) { if (true) { _nocheck__trace_sungem_mii_invalid_op(op); } } #define TRACE_SUNGEM_MMIO_GREG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_GREG_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_greg_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_GREG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 346 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_greg_write " "MMIO greg write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10190 "trace/trace-hw_net.h" } else { #line 346 "../hw/net/trace-events" qemu_log("sungem_mmio_greg_write " "MMIO greg write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10194 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_greg_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_greg_write(addr, val); } } #define TRACE_SUNGEM_MMIO_GREG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_GREG_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_greg_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_GREG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 347 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_greg_read " "MMIO greg read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10221 "trace/trace-hw_net.h" } else { #line 347 "../hw/net/trace-events" qemu_log("sungem_mmio_greg_read " "MMIO greg read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10225 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_greg_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_greg_read(addr, val); } } #define TRACE_SUNGEM_MMIO_TXDMA_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_TXDMA_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_txdma_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_TXDMA_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 348 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_txdma_write " "MMIO txdma write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10252 "trace/trace-hw_net.h" } else { #line 348 "../hw/net/trace-events" qemu_log("sungem_mmio_txdma_write " "MMIO txdma write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10256 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_txdma_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_txdma_write(addr, val); } } #define TRACE_SUNGEM_MMIO_TXDMA_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_TXDMA_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_txdma_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_TXDMA_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 349 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_txdma_read " "MMIO txdma read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10283 "trace/trace-hw_net.h" } else { #line 349 "../hw/net/trace-events" qemu_log("sungem_mmio_txdma_read " "MMIO txdma read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10287 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_txdma_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_txdma_read(addr, val); } } #define TRACE_SUNGEM_MMIO_RXDMA_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_RXDMA_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_RXDMA_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 350 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_rxdma_write " "MMIO rxdma write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10314 "trace/trace-hw_net.h" } else { #line 350 "../hw/net/trace-events" qemu_log("sungem_mmio_rxdma_write " "MMIO rxdma write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10318 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_rxdma_write(addr, val); } } #define TRACE_SUNGEM_MMIO_RXDMA_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_RXDMA_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_RXDMA_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 351 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_rxdma_read " "MMIO rxdma read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10345 "trace/trace-hw_net.h" } else { #line 351 "../hw/net/trace-events" qemu_log("sungem_mmio_rxdma_read " "MMIO rxdma read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10349 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_rxdma_read(addr, val); } } #define TRACE_SUNGEM_MMIO_WOL_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_WOL_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_wol_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_WOL_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 352 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_wol_write " "MMIO wol write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10376 "trace/trace-hw_net.h" } else { #line 352 "../hw/net/trace-events" qemu_log("sungem_mmio_wol_write " "MMIO wol write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10380 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_wol_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_wol_write(addr, val); } } #define TRACE_SUNGEM_MMIO_WOL_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_WOL_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_wol_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_WOL_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 353 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_wol_read " "MMIO wol read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10407 "trace/trace-hw_net.h" } else { #line 353 "../hw/net/trace-events" qemu_log("sungem_mmio_wol_read " "MMIO wol read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10411 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_wol_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_wol_read(addr, val); } } #define TRACE_SUNGEM_MMIO_MAC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_MAC_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_mac_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_MAC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 354 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_mac_write " "MMIO mac write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10438 "trace/trace-hw_net.h" } else { #line 354 "../hw/net/trace-events" qemu_log("sungem_mmio_mac_write " "MMIO mac write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10442 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_mac_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_mac_write(addr, val); } } #define TRACE_SUNGEM_MMIO_MAC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_MAC_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_mac_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_MAC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 355 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_mac_read " "MMIO mac read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10469 "trace/trace-hw_net.h" } else { #line 355 "../hw/net/trace-events" qemu_log("sungem_mmio_mac_read " "MMIO mac read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10473 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_mac_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_mac_read(addr, val); } } #define TRACE_SUNGEM_MMIO_MIF_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_MIF_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_mif_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_MIF_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 356 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_mif_write " "MMIO mif write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10500 "trace/trace-hw_net.h" } else { #line 356 "../hw/net/trace-events" qemu_log("sungem_mmio_mif_write " "MMIO mif write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10504 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_mif_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_mif_write(addr, val); } } #define TRACE_SUNGEM_MMIO_MIF_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_MIF_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_mif_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_MIF_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 357 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_mif_read " "MMIO mif read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10531 "trace/trace-hw_net.h" } else { #line 357 "../hw/net/trace-events" qemu_log("sungem_mmio_mif_read " "MMIO mif read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10535 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_mif_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_mif_read(addr, val); } } #define TRACE_SUNGEM_MMIO_PCS_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_PCS_WRITE) || \ false) static inline void _nocheck__trace_sungem_mmio_pcs_write(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_PCS_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 358 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_pcs_write " "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10562 "trace/trace-hw_net.h" } else { #line 358 "../hw/net/trace-events" qemu_log("sungem_mmio_pcs_write " "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10566 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_pcs_write(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_pcs_write(addr, val); } } #define TRACE_SUNGEM_MMIO_PCS_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNGEM_MMIO_PCS_READ) || \ false) static inline void _nocheck__trace_sungem_mmio_pcs_read(uint64_t addr, uint64_t val) { if (trace_event_get_state(TRACE_SUNGEM_MMIO_PCS_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 359 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sungem_mmio_pcs_read " "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 10593 "trace/trace-hw_net.h" } else { #line 359 "../hw/net/trace-events" qemu_log("sungem_mmio_pcs_read " "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64 "\n", addr, val); #line 10597 "trace/trace-hw_net.h" } } } static inline void trace_sungem_mmio_pcs_read(uint64_t addr, uint64_t val) { if (true) { _nocheck__trace_sungem_mmio_pcs_read(addr, val); } } #define TRACE_SUNHME_SEB_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_SEB_WRITE) || \ false) static inline void _nocheck__trace_sunhme_seb_write(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_SEB_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 362 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_seb_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10624 "trace/trace-hw_net.h" } else { #line 362 "../hw/net/trace-events" qemu_log("sunhme_seb_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10628 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_seb_write(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_seb_write(addr, value); } } #define TRACE_SUNHME_SEB_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_SEB_READ) || \ false) static inline void _nocheck__trace_sunhme_seb_read(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_SEB_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 363 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_seb_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10655 "trace/trace-hw_net.h" } else { #line 363 "../hw/net/trace-events" qemu_log("sunhme_seb_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10659 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_seb_read(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_seb_read(addr, value); } } #define TRACE_SUNHME_ETX_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_ETX_WRITE) || \ false) static inline void _nocheck__trace_sunhme_etx_write(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_ETX_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 364 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_etx_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10686 "trace/trace-hw_net.h" } else { #line 364 "../hw/net/trace-events" qemu_log("sunhme_etx_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10690 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_etx_write(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_etx_write(addr, value); } } #define TRACE_SUNHME_ETX_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_ETX_READ) || \ false) static inline void _nocheck__trace_sunhme_etx_read(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_ETX_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 365 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_etx_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10717 "trace/trace-hw_net.h" } else { #line 365 "../hw/net/trace-events" qemu_log("sunhme_etx_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10721 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_etx_read(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_etx_read(addr, value); } } #define TRACE_SUNHME_ERX_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_ERX_WRITE) || \ false) static inline void _nocheck__trace_sunhme_erx_write(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_ERX_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 366 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_erx_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10748 "trace/trace-hw_net.h" } else { #line 366 "../hw/net/trace-events" qemu_log("sunhme_erx_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10752 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_erx_write(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_erx_write(addr, value); } } #define TRACE_SUNHME_ERX_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_ERX_READ) || \ false) static inline void _nocheck__trace_sunhme_erx_read(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_ERX_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 367 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_erx_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10779 "trace/trace-hw_net.h" } else { #line 367 "../hw/net/trace-events" qemu_log("sunhme_erx_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10783 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_erx_read(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_erx_read(addr, value); } } #define TRACE_SUNHME_MAC_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MAC_WRITE) || \ false) static inline void _nocheck__trace_sunhme_mac_write(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_MAC_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 368 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mac_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10810 "trace/trace-hw_net.h" } else { #line 368 "../hw/net/trace-events" qemu_log("sunhme_mac_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10814 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mac_write(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_mac_write(addr, value); } } #define TRACE_SUNHME_MAC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MAC_READ) || \ false) static inline void _nocheck__trace_sunhme_mac_read(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_MAC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 369 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mac_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10841 "trace/trace-hw_net.h" } else { #line 369 "../hw/net/trace-events" qemu_log("sunhme_mac_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10845 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mac_read(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_mac_read(addr, value); } } #define TRACE_SUNHME_MII_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MII_WRITE) || \ false) static inline void _nocheck__trace_sunhme_mii_write(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_MII_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 370 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mii_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10872 "trace/trace-hw_net.h" } else { #line 370 "../hw/net/trace-events" qemu_log("sunhme_mii_write " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10876 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mii_write(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_mii_write(addr, value); } } #define TRACE_SUNHME_MII_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MII_READ) || \ false) static inline void _nocheck__trace_sunhme_mii_read(uint8_t addr, uint16_t value) { if (trace_event_get_state(TRACE_SUNHME_MII_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 371 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mii_read " "addr 0x%x value 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10903 "trace/trace-hw_net.h" } else { #line 371 "../hw/net/trace-events" qemu_log("sunhme_mii_read " "addr 0x%x value 0x%x" "\n", addr, value); #line 10907 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mii_read(uint8_t addr, uint16_t value) { if (true) { _nocheck__trace_sunhme_mii_read(addr, value); } } #define TRACE_SUNHME_MIF_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MIF_WRITE) || \ false) static inline void _nocheck__trace_sunhme_mif_write(uint8_t addr, uint16_t value) { if (trace_event_get_state(TRACE_SUNHME_MIF_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 372 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mif_write " "addr 0x%x value 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10934 "trace/trace-hw_net.h" } else { #line 372 "../hw/net/trace-events" qemu_log("sunhme_mif_write " "addr 0x%x value 0x%x" "\n", addr, value); #line 10938 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mif_write(uint8_t addr, uint16_t value) { if (true) { _nocheck__trace_sunhme_mif_write(addr, value); } } #define TRACE_SUNHME_MIF_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_MIF_READ) || \ false) static inline void _nocheck__trace_sunhme_mif_read(uint64_t addr, uint64_t value) { if (trace_event_get_state(TRACE_SUNHME_MIF_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 373 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_mif_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, value); #line 10965 "trace/trace-hw_net.h" } else { #line 373 "../hw/net/trace-events" qemu_log("sunhme_mif_read " "addr 0x%"PRIx64" value 0x%"PRIx64 "\n", addr, value); #line 10969 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_mif_read(uint64_t addr, uint64_t value) { if (true) { _nocheck__trace_sunhme_mif_read(addr, value); } } #define TRACE_SUNHME_TX_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_TX_DESC) || \ false) static inline void _nocheck__trace_sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) { if (trace_event_get_state(TRACE_SUNHME_TX_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 374 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_tx_desc " "addr 0x%"PRIx64" status 0x%"PRIx32 " (ring %d/%d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , buffer, status, cr, nr); #line 10996 "trace/trace-hw_net.h" } else { #line 374 "../hw/net/trace-events" qemu_log("sunhme_tx_desc " "addr 0x%"PRIx64" status 0x%"PRIx32 " (ring %d/%d)" "\n", buffer, status, cr, nr); #line 11000 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) { if (true) { _nocheck__trace_sunhme_tx_desc(buffer, status, cr, nr); } } #define TRACE_SUNHME_TX_XSUM_ADD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_TX_XSUM_ADD) || \ false) static inline void _nocheck__trace_sunhme_tx_xsum_add(int offset, int len) { if (trace_event_get_state(TRACE_SUNHME_TX_XSUM_ADD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 375 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_tx_xsum_add " "adding xsum at offset %d, len %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , offset, len); #line 11027 "trace/trace-hw_net.h" } else { #line 375 "../hw/net/trace-events" qemu_log("sunhme_tx_xsum_add " "adding xsum at offset %d, len %d" "\n", offset, len); #line 11031 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_tx_xsum_add(int offset, int len) { if (true) { _nocheck__trace_sunhme_tx_xsum_add(offset, len); } } #define TRACE_SUNHME_TX_XSUM_STUFF_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_TX_XSUM_STUFF) || \ false) static inline void _nocheck__trace_sunhme_tx_xsum_stuff(uint16_t xsum, int offset) { if (trace_event_get_state(TRACE_SUNHME_TX_XSUM_STUFF) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 376 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_tx_xsum_stuff " "stuffing xsum 0x%x at offset %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , xsum, offset); #line 11058 "trace/trace-hw_net.h" } else { #line 376 "../hw/net/trace-events" qemu_log("sunhme_tx_xsum_stuff " "stuffing xsum 0x%x at offset %d" "\n", xsum, offset); #line 11062 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_tx_xsum_stuff(uint16_t xsum, int offset) { if (true) { _nocheck__trace_sunhme_tx_xsum_stuff(xsum, offset); } } #define TRACE_SUNHME_TX_DONE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_TX_DONE) || \ false) static inline void _nocheck__trace_sunhme_tx_done(int len) { if (trace_event_get_state(TRACE_SUNHME_TX_DONE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 377 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_tx_done " "successfully transmitted frame with len %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 11089 "trace/trace-hw_net.h" } else { #line 377 "../hw/net/trace-events" qemu_log("sunhme_tx_done " "successfully transmitted frame with len %d" "\n", len); #line 11093 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_tx_done(int len) { if (true) { _nocheck__trace_sunhme_tx_done(len); } } #define TRACE_SUNHME_RX_INCOMING_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_INCOMING) || \ false) static inline void _nocheck__trace_sunhme_rx_incoming(size_t len) { if (trace_event_get_state(TRACE_SUNHME_RX_INCOMING) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 378 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_incoming " "received incoming frame with len %zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 11120 "trace/trace-hw_net.h" } else { #line 378 "../hw/net/trace-events" qemu_log("sunhme_rx_incoming " "received incoming frame with len %zu" "\n", len); #line 11124 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_incoming(size_t len) { if (true) { _nocheck__trace_sunhme_rx_incoming(len); } } #define TRACE_SUNHME_RX_FILTER_DESTMAC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_DESTMAC) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_DESTMAC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 379 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_destmac " "received frame for MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , b0, b1, b2, b3, b4, b5); #line 11151 "trace/trace-hw_net.h" } else { #line 379 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_destmac " "received frame for MAC: %02x:%02x:%02x:%02x:%02x:%02x" "\n", b0, b1, b2, b3, b4, b5); #line 11155 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) { if (true) { _nocheck__trace_sunhme_rx_filter_destmac(b0, b1, b2, b3, b4, b5); } } #define TRACE_SUNHME_RX_FILTER_LOCAL_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_LOCAL_MATCH) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_local_match(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_LOCAL_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 380 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_local_match " "incoming frame matches local MAC address" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11182 "trace/trace-hw_net.h" } else { #line 380 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_local_match " "incoming frame matches local MAC address" "\n"); #line 11186 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_local_match(void) { if (true) { _nocheck__trace_sunhme_rx_filter_local_match(); } } #define TRACE_SUNHME_RX_FILTER_BCAST_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_BCAST_MATCH) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_bcast_match(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_BCAST_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 381 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_bcast_match " "incoming frame matches broadcast MAC address" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11213 "trace/trace-hw_net.h" } else { #line 381 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_bcast_match " "incoming frame matches broadcast MAC address" "\n"); #line 11217 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_bcast_match(void) { if (true) { _nocheck__trace_sunhme_rx_filter_bcast_match(); } } #define TRACE_SUNHME_RX_FILTER_HASH_NOMATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_HASH_NOMATCH) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_hash_nomatch(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_HASH_NOMATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 382 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_hash_nomatch " "incoming MAC address not in hash table" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11244 "trace/trace-hw_net.h" } else { #line 382 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_hash_nomatch " "incoming MAC address not in hash table" "\n"); #line 11248 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_hash_nomatch(void) { if (true) { _nocheck__trace_sunhme_rx_filter_hash_nomatch(); } } #define TRACE_SUNHME_RX_FILTER_HASH_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_HASH_MATCH) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_hash_match(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_HASH_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 383 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_hash_match " "incoming MAC address found in hash table" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11275 "trace/trace-hw_net.h" } else { #line 383 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_hash_match " "incoming MAC address found in hash table" "\n"); #line 11279 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_hash_match(void) { if (true) { _nocheck__trace_sunhme_rx_filter_hash_match(); } } #define TRACE_SUNHME_RX_FILTER_PROMISC_MATCH_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_PROMISC_MATCH) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_promisc_match(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_PROMISC_MATCH) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 384 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_promisc_match " "incoming frame accepted due to promiscuous mode" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11306 "trace/trace-hw_net.h" } else { #line 384 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_promisc_match " "incoming frame accepted due to promiscuous mode" "\n"); #line 11310 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_promisc_match(void) { if (true) { _nocheck__trace_sunhme_rx_filter_promisc_match(); } } #define TRACE_SUNHME_RX_FILTER_REJECT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_REJECT) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_reject(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_REJECT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 385 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_reject " "rejecting incoming frame" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11337 "trace/trace-hw_net.h" } else { #line 385 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_reject " "rejecting incoming frame" "\n"); #line 11341 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_reject(void) { if (true) { _nocheck__trace_sunhme_rx_filter_reject(); } } #define TRACE_SUNHME_RX_FILTER_ACCEPT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_FILTER_ACCEPT) || \ false) static inline void _nocheck__trace_sunhme_rx_filter_accept(void) { if (trace_event_get_state(TRACE_SUNHME_RX_FILTER_ACCEPT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 386 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_filter_accept " "accepting incoming frame" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11368 "trace/trace-hw_net.h" } else { #line 386 "../hw/net/trace-events" qemu_log("sunhme_rx_filter_accept " "accepting incoming frame" "\n"); #line 11372 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_filter_accept(void) { if (true) { _nocheck__trace_sunhme_rx_filter_accept(); } } #define TRACE_SUNHME_RX_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_DESC) || \ false) static inline void _nocheck__trace_sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) { if (trace_event_get_state(TRACE_SUNHME_RX_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 387 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_desc " "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, offset, status, len, cr, nr); #line 11399 "trace/trace-hw_net.h" } else { #line 387 "../hw/net/trace-events" qemu_log("sunhme_rx_desc " "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)" "\n", addr, offset, status, len, cr, nr); #line 11403 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) { if (true) { _nocheck__trace_sunhme_rx_desc(addr, offset, status, len, cr, nr); } } #define TRACE_SUNHME_RX_XSUM_CALC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_XSUM_CALC) || \ false) static inline void _nocheck__trace_sunhme_rx_xsum_calc(uint16_t xsum) { if (trace_event_get_state(TRACE_SUNHME_RX_XSUM_CALC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 388 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_xsum_calc " "calculated incoming xsum as 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , xsum); #line 11430 "trace/trace-hw_net.h" } else { #line 388 "../hw/net/trace-events" qemu_log("sunhme_rx_xsum_calc " "calculated incoming xsum as 0x%x" "\n", xsum); #line 11434 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_xsum_calc(uint16_t xsum) { if (true) { _nocheck__trace_sunhme_rx_xsum_calc(xsum); } } #define TRACE_SUNHME_RX_NORXD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_RX_NORXD) || \ false) static inline void _nocheck__trace_sunhme_rx_norxd(void) { if (trace_event_get_state(TRACE_SUNHME_RX_NORXD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 389 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_rx_norxd " "no free rx descriptors available" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11461 "trace/trace-hw_net.h" } else { #line 389 "../hw/net/trace-events" qemu_log("sunhme_rx_norxd " "no free rx descriptors available" "\n"); #line 11465 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_rx_norxd(void) { if (true) { _nocheck__trace_sunhme_rx_norxd(); } } #define TRACE_SUNHME_UPDATE_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_SUNHME_UPDATE_IRQ) || \ false) static inline void _nocheck__trace_sunhme_update_irq(uint32_t mifmask, uint32_t mif, uint32_t sebmask, uint32_t seb, int level) { if (trace_event_get_state(TRACE_SUNHME_UPDATE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 390 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:sunhme_update_irq " "mifmask: 0x%x mif: 0x%x sebmask: 0x%x seb: 0x%x level: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , mifmask, mif, sebmask, seb, level); #line 11492 "trace/trace-hw_net.h" } else { #line 390 "../hw/net/trace-events" qemu_log("sunhme_update_irq " "mifmask: 0x%x mif: 0x%x sebmask: 0x%x seb: 0x%x level: %d" "\n", mifmask, mif, sebmask, seb, level); #line 11496 "trace/trace-hw_net.h" } } } static inline void trace_sunhme_update_irq(uint32_t mifmask, uint32_t mif, uint32_t sebmask, uint32_t seb, int level) { if (true) { _nocheck__trace_sunhme_update_irq(mifmask, mif, sebmask, seb, level); } } #define TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY) || \ false) static inline void _nocheck__trace_virtio_net_announce_notify(void) { if (trace_event_get_state(TRACE_VIRTIO_NET_ANNOUNCE_NOTIFY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 393 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_announce_notify " "" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11523 "trace/trace-hw_net.h" } else { #line 393 "../hw/net/trace-events" qemu_log("virtio_net_announce_notify " "" "\n"); #line 11527 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_announce_notify(void) { if (true) { _nocheck__trace_virtio_net_announce_notify(); } } #define TRACE_VIRTIO_NET_ANNOUNCE_TIMER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_ANNOUNCE_TIMER) || \ false) static inline void _nocheck__trace_virtio_net_announce_timer(int round) { if (trace_event_get_state(TRACE_VIRTIO_NET_ANNOUNCE_TIMER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 394 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_announce_timer " "%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , round); #line 11554 "trace/trace-hw_net.h" } else { #line 394 "../hw/net/trace-events" qemu_log("virtio_net_announce_timer " "%d" "\n", round); #line 11558 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_announce_timer(int round) { if (true) { _nocheck__trace_virtio_net_announce_timer(round); } } #define TRACE_VIRTIO_NET_HANDLE_ANNOUNCE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_HANDLE_ANNOUNCE) || \ false) static inline void _nocheck__trace_virtio_net_handle_announce(int round) { if (trace_event_get_state(TRACE_VIRTIO_NET_HANDLE_ANNOUNCE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 395 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_handle_announce " "%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , round); #line 11585 "trace/trace-hw_net.h" } else { #line 395 "../hw/net/trace-events" qemu_log("virtio_net_handle_announce " "%d" "\n", round); #line 11589 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_handle_announce(int round) { if (true) { _nocheck__trace_virtio_net_handle_announce(round); } } #define TRACE_VIRTIO_NET_POST_LOAD_DEVICE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_POST_LOAD_DEVICE) || \ false) static inline void _nocheck__trace_virtio_net_post_load_device(void) { if (trace_event_get_state(TRACE_VIRTIO_NET_POST_LOAD_DEVICE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 396 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_post_load_device " "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 11616 "trace/trace-hw_net.h" } else { #line 396 "../hw/net/trace-events" qemu_log("virtio_net_post_load_device " "\n"); #line 11620 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_post_load_device(void) { if (true) { _nocheck__trace_virtio_net_post_load_device(); } } #define TRACE_VIRTIO_NET_RSS_LOAD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_RSS_LOAD) || \ false) static inline void _nocheck__trace_virtio_net_rss_load(void * nic, size_t nfds, void * fds) { if (trace_event_get_state(TRACE_VIRTIO_NET_RSS_LOAD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 397 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_rss_load " "nic=%p nfds=%zu fds=%p" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nic, nfds, fds); #line 11647 "trace/trace-hw_net.h" } else { #line 397 "../hw/net/trace-events" qemu_log("virtio_net_rss_load " "nic=%p nfds=%zu fds=%p" "\n", nic, nfds, fds); #line 11651 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_rss_load(void * nic, size_t nfds, void * fds) { if (true) { _nocheck__trace_virtio_net_rss_load(nic, nfds, fds); } } #define TRACE_VIRTIO_NET_RSS_ATTACH_EBPF_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_RSS_ATTACH_EBPF) || \ false) static inline void _nocheck__trace_virtio_net_rss_attach_ebpf(void * nic, int prog_fd) { if (trace_event_get_state(TRACE_VIRTIO_NET_RSS_ATTACH_EBPF) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 398 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_rss_attach_ebpf " "nic=%p prog-fd=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nic, prog_fd); #line 11678 "trace/trace-hw_net.h" } else { #line 398 "../hw/net/trace-events" qemu_log("virtio_net_rss_attach_ebpf " "nic=%p prog-fd=%d" "\n", nic, prog_fd); #line 11682 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_rss_attach_ebpf(void * nic, int prog_fd) { if (true) { _nocheck__trace_virtio_net_rss_attach_ebpf(nic, prog_fd); } } #define TRACE_VIRTIO_NET_RSS_DISABLE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_RSS_DISABLE) || \ false) static inline void _nocheck__trace_virtio_net_rss_disable(void * nic) { if (trace_event_get_state(TRACE_VIRTIO_NET_RSS_DISABLE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 399 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_rss_disable " "nic=%p" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nic); #line 11709 "trace/trace-hw_net.h" } else { #line 399 "../hw/net/trace-events" qemu_log("virtio_net_rss_disable " "nic=%p" "\n", nic); #line 11713 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_rss_disable(void * nic) { if (true) { _nocheck__trace_virtio_net_rss_disable(nic); } } #define TRACE_VIRTIO_NET_RSS_ERROR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_RSS_ERROR) || \ false) static inline void _nocheck__trace_virtio_net_rss_error(void * nic, const char * msg, uint32_t value) { if (trace_event_get_state(TRACE_VIRTIO_NET_RSS_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 400 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_rss_error " "nic=%p msg=%s, value 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nic, msg, value); #line 11740 "trace/trace-hw_net.h" } else { #line 400 "../hw/net/trace-events" qemu_log("virtio_net_rss_error " "nic=%p msg=%s, value 0x%08x" "\n", nic, msg, value); #line 11744 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_rss_error(void * nic, const char * msg, uint32_t value) { if (true) { _nocheck__trace_virtio_net_rss_error(nic, msg, value); } } #define TRACE_VIRTIO_NET_RSS_ENABLE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_VIRTIO_NET_RSS_ENABLE) || \ false) static inline void _nocheck__trace_virtio_net_rss_enable(void * nic, uint32_t p1, uint16_t p2, uint8_t p3) { if (trace_event_get_state(TRACE_VIRTIO_NET_RSS_ENABLE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 401 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:virtio_net_rss_enable " "nic=%p hashes 0x%x, table of %d, key of %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , nic, p1, p2, p3); #line 11771 "trace/trace-hw_net.h" } else { #line 401 "../hw/net/trace-events" qemu_log("virtio_net_rss_enable " "nic=%p hashes 0x%x, table of %d, key of %d" "\n", nic, p1, p2, p3); #line 11775 "trace/trace-hw_net.h" } } } static inline void trace_virtio_net_rss_enable(void * nic, uint32_t p1, uint16_t p2, uint8_t p3) { if (true) { _nocheck__trace_virtio_net_rss_enable(nic, p1, p2, p3); } } #define TRACE_TULIP_REG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_REG_WRITE) || \ false) static inline void _nocheck__trace_tulip_reg_write(uint64_t addr, const char * name, int size, uint64_t val) { if (trace_event_get_state(TRACE_TULIP_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 404 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_reg_write " "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, name, size, val); #line 11802 "trace/trace-hw_net.h" } else { #line 404 "../hw/net/trace-events" qemu_log("tulip_reg_write " "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 "\n", addr, name, size, val); #line 11806 "trace/trace-hw_net.h" } } } static inline void trace_tulip_reg_write(uint64_t addr, const char * name, int size, uint64_t val) { if (true) { _nocheck__trace_tulip_reg_write(addr, name, size, val); } } #define TRACE_TULIP_REG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_REG_READ) || \ false) static inline void _nocheck__trace_tulip_reg_read(uint64_t addr, const char * name, int size, uint64_t val) { if (trace_event_get_state(TRACE_TULIP_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 405 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_reg_read " "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, name, size, val); #line 11833 "trace/trace-hw_net.h" } else { #line 405 "../hw/net/trace-events" qemu_log("tulip_reg_read " "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 "\n", addr, name, size, val); #line 11837 "trace/trace-hw_net.h" } } } static inline void trace_tulip_reg_read(uint64_t addr, const char * name, int size, uint64_t val) { if (true) { _nocheck__trace_tulip_reg_read(addr, name, size, val); } } #define TRACE_TULIP_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_RECEIVE) || \ false) static inline void _nocheck__trace_tulip_receive(const uint8_t * buf, size_t len) { if (trace_event_get_state(TRACE_TULIP_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 406 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_receive " "buf %p size %zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , buf, len); #line 11864 "trace/trace-hw_net.h" } else { #line 406 "../hw/net/trace-events" qemu_log("tulip_receive " "buf %p size %zu" "\n", buf, len); #line 11868 "trace/trace-hw_net.h" } } } static inline void trace_tulip_receive(const uint8_t * buf, size_t len) { if (true) { _nocheck__trace_tulip_receive(buf, len); } } #define TRACE_TULIP_DESCRIPTOR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_DESCRIPTOR) || \ false) static inline void _nocheck__trace_tulip_descriptor(const char * prefix, uint32_t addr, uint32_t status, uint32_t control, uint32_t len1, uint32_t len2, uint32_t buf1, uint32_t buf2) { if (trace_event_get_state(TRACE_TULIP_DESCRIPTOR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 407 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_descriptor " "%s 0x%08x: status 0x%08x control 0x%03x len1 %4d len2 %4d buf1 0x%08x buf2 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , prefix, addr, status, control, len1, len2, buf1, buf2); #line 11895 "trace/trace-hw_net.h" } else { #line 407 "../hw/net/trace-events" qemu_log("tulip_descriptor " "%s 0x%08x: status 0x%08x control 0x%03x len1 %4d len2 %4d buf1 0x%08x buf2 0x%08x" "\n", prefix, addr, status, control, len1, len2, buf1, buf2); #line 11899 "trace/trace-hw_net.h" } } } static inline void trace_tulip_descriptor(const char * prefix, uint32_t addr, uint32_t status, uint32_t control, uint32_t len1, uint32_t len2, uint32_t buf1, uint32_t buf2) { if (true) { _nocheck__trace_tulip_descriptor(prefix, addr, status, control, len1, len2, buf1, buf2); } } #define TRACE_TULIP_RX_STATE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_RX_STATE) || \ false) static inline void _nocheck__trace_tulip_rx_state(const char * state) { if (trace_event_get_state(TRACE_TULIP_RX_STATE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 408 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_rx_state " "RX %s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , state); #line 11926 "trace/trace-hw_net.h" } else { #line 408 "../hw/net/trace-events" qemu_log("tulip_rx_state " "RX %s" "\n", state); #line 11930 "trace/trace-hw_net.h" } } } static inline void trace_tulip_rx_state(const char * state) { if (true) { _nocheck__trace_tulip_rx_state(state); } } #define TRACE_TULIP_TX_STATE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_TX_STATE) || \ false) static inline void _nocheck__trace_tulip_tx_state(const char * state) { if (trace_event_get_state(TRACE_TULIP_TX_STATE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 409 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_tx_state " "TX %s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , state); #line 11957 "trace/trace-hw_net.h" } else { #line 409 "../hw/net/trace-events" qemu_log("tulip_tx_state " "TX %s" "\n", state); #line 11961 "trace/trace-hw_net.h" } } } static inline void trace_tulip_tx_state(const char * state) { if (true) { _nocheck__trace_tulip_tx_state(state); } } #define TRACE_TULIP_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_IRQ) || \ false) static inline void _nocheck__trace_tulip_irq(uint32_t mask, uint32_t en, const char * state) { if (trace_event_get_state(TRACE_TULIP_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 410 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_irq " "mask 0x%08x ie 0x%08x %s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , mask, en, state); #line 11988 "trace/trace-hw_net.h" } else { #line 410 "../hw/net/trace-events" qemu_log("tulip_irq " "mask 0x%08x ie 0x%08x %s" "\n", mask, en, state); #line 11992 "trace/trace-hw_net.h" } } } static inline void trace_tulip_irq(uint32_t mask, uint32_t en, const char * state) { if (true) { _nocheck__trace_tulip_irq(mask, en, state); } } #define TRACE_TULIP_MII_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_MII_WRITE) || \ false) static inline void _nocheck__trace_tulip_mii_write(int phy, int reg, uint16_t data) { if (trace_event_get_state(TRACE_TULIP_MII_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 411 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_mii_write " "phy 0x%x reg 0x%x data 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy, reg, data); #line 12019 "trace/trace-hw_net.h" } else { #line 411 "../hw/net/trace-events" qemu_log("tulip_mii_write " "phy 0x%x reg 0x%x data 0x%04x" "\n", phy, reg, data); #line 12023 "trace/trace-hw_net.h" } } } static inline void trace_tulip_mii_write(int phy, int reg, uint16_t data) { if (true) { _nocheck__trace_tulip_mii_write(phy, reg, data); } } #define TRACE_TULIP_MII_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_MII_READ) || \ false) static inline void _nocheck__trace_tulip_mii_read(int phy, int reg, uint16_t data) { if (trace_event_get_state(TRACE_TULIP_MII_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 412 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_mii_read " "phy 0x%x, reg 0x%x data 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy, reg, data); #line 12050 "trace/trace-hw_net.h" } else { #line 412 "../hw/net/trace-events" qemu_log("tulip_mii_read " "phy 0x%x, reg 0x%x data 0x%04x" "\n", phy, reg, data); #line 12054 "trace/trace-hw_net.h" } } } static inline void trace_tulip_mii_read(int phy, int reg, uint16_t data) { if (true) { _nocheck__trace_tulip_mii_read(phy, reg, data); } } #define TRACE_TULIP_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_RESET) || \ false) static inline void _nocheck__trace_tulip_reset(void) { if (trace_event_get_state(TRACE_TULIP_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 413 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_reset " "" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 12081 "trace/trace-hw_net.h" } else { #line 413 "../hw/net/trace-events" qemu_log("tulip_reset " "" "\n"); #line 12085 "trace/trace-hw_net.h" } } } static inline void trace_tulip_reset(void) { if (true) { _nocheck__trace_tulip_reset(); } } #define TRACE_TULIP_SETUP_FRAME_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_SETUP_FRAME) || \ false) static inline void _nocheck__trace_tulip_setup_frame(void) { if (trace_event_get_state(TRACE_TULIP_SETUP_FRAME) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 414 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_setup_frame " "" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 12112 "trace/trace-hw_net.h" } else { #line 414 "../hw/net/trace-events" qemu_log("tulip_setup_frame " "" "\n"); #line 12116 "trace/trace-hw_net.h" } } } static inline void trace_tulip_setup_frame(void) { if (true) { _nocheck__trace_tulip_setup_frame(); } } #define TRACE_TULIP_SETUP_FILTER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_TULIP_SETUP_FILTER) || \ false) static inline void _nocheck__trace_tulip_setup_filter(int n, uint8_t a, uint8_t b, uint8_t c, uint8_t d, uint8_t e, uint8_t f) { if (trace_event_get_state(TRACE_TULIP_SETUP_FILTER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 415 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:tulip_setup_filter " "%d: %02x:%02x:%02x:%02x:%02x:%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , n, a, b, c, d, e, f); #line 12143 "trace/trace-hw_net.h" } else { #line 415 "../hw/net/trace-events" qemu_log("tulip_setup_filter " "%d: %02x:%02x:%02x:%02x:%02x:%02x" "\n", n, a, b, c, d, e, f); #line 12147 "trace/trace-hw_net.h" } } } static inline void trace_tulip_setup_filter(int n, uint8_t a, uint8_t b, uint8_t c, uint8_t d, uint8_t e, uint8_t f) { if (true) { _nocheck__trace_tulip_setup_filter(n, a, b, c, d, e, f); } } #define TRACE_LASI_82596_MEM_READW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_LASI_82596_MEM_READW) || \ false) static inline void _nocheck__trace_lasi_82596_mem_readw(uint64_t addr, uint32_t ret) { if (trace_event_get_state(TRACE_LASI_82596_MEM_READW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 418 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:lasi_82596_mem_readw " "addr=0x%"PRIx64" val=0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, ret); #line 12174 "trace/trace-hw_net.h" } else { #line 418 "../hw/net/trace-events" qemu_log("lasi_82596_mem_readw " "addr=0x%"PRIx64" val=0x%04x" "\n", addr, ret); #line 12178 "trace/trace-hw_net.h" } } } static inline void trace_lasi_82596_mem_readw(uint64_t addr, uint32_t ret) { if (true) { _nocheck__trace_lasi_82596_mem_readw(addr, ret); } } #define TRACE_LASI_82596_MEM_WRITEW_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_LASI_82596_MEM_WRITEW) || \ false) static inline void _nocheck__trace_lasi_82596_mem_writew(uint64_t addr, uint32_t val) { if (trace_event_get_state(TRACE_LASI_82596_MEM_WRITEW) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 419 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:lasi_82596_mem_writew " "addr=0x%"PRIx64" val=0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, val); #line 12205 "trace/trace-hw_net.h" } else { #line 419 "../hw/net/trace-events" qemu_log("lasi_82596_mem_writew " "addr=0x%"PRIx64" val=0x%04x" "\n", addr, val); #line 12209 "trace/trace-hw_net.h" } } } static inline void trace_lasi_82596_mem_writew(uint64_t addr, uint32_t val) { if (true) { _nocheck__trace_lasi_82596_mem_writew(addr, val); } } #define TRACE_I82596_S_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_S_RESET) || \ false) static inline void _nocheck__trace_i82596_s_reset(void * s) { if (trace_event_get_state(TRACE_I82596_S_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 422 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_s_reset " "%p Reset chip" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 12236 "trace/trace-hw_net.h" } else { #line 422 "../hw/net/trace-events" qemu_log("i82596_s_reset " "%p Reset chip" "\n", s); #line 12240 "trace/trace-hw_net.h" } } } static inline void trace_i82596_s_reset(void * s) { if (true) { _nocheck__trace_i82596_s_reset(s); } } #define TRACE_I82596_TRANSMIT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_TRANSMIT) || \ false) static inline void _nocheck__trace_i82596_transmit(uint32_t size, uint32_t addr) { if (trace_event_get_state(TRACE_I82596_TRANSMIT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 423 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_transmit " "size %u from addr 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size, addr); #line 12267 "trace/trace-hw_net.h" } else { #line 423 "../hw/net/trace-events" qemu_log("i82596_transmit " "size %u from addr 0x%04x" "\n", size, addr); #line 12271 "trace/trace-hw_net.h" } } } static inline void trace_i82596_transmit(uint32_t size, uint32_t addr) { if (true) { _nocheck__trace_i82596_transmit(size, addr); } } #define TRACE_I82596_RECEIVE_ANALYSIS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_RECEIVE_ANALYSIS) || \ false) static inline void _nocheck__trace_i82596_receive_analysis(const char * s) { if (trace_event_get_state(TRACE_I82596_RECEIVE_ANALYSIS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 424 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_receive_analysis " "%s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 12298 "trace/trace-hw_net.h" } else { #line 424 "../hw/net/trace-events" qemu_log("i82596_receive_analysis " "%s" "\n", s); #line 12302 "trace/trace-hw_net.h" } } } static inline void trace_i82596_receive_analysis(const char * s) { if (true) { _nocheck__trace_i82596_receive_analysis(s); } } #define TRACE_I82596_RECEIVE_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_RECEIVE_PACKET) || \ false) static inline void _nocheck__trace_i82596_receive_packet(size_t sz) { if (trace_event_get_state(TRACE_I82596_RECEIVE_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 425 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_receive_packet " "len=%zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , sz); #line 12329 "trace/trace-hw_net.h" } else { #line 425 "../hw/net/trace-events" qemu_log("i82596_receive_packet " "len=%zu" "\n", sz); #line 12333 "trace/trace-hw_net.h" } } } static inline void trace_i82596_receive_packet(size_t sz) { if (true) { _nocheck__trace_i82596_receive_packet(sz); } } #define TRACE_I82596_NEW_MAC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_NEW_MAC) || \ false) static inline void _nocheck__trace_i82596_new_mac(const char * id_with_mac) { if (trace_event_get_state(TRACE_I82596_NEW_MAC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 426 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_new_mac " "New MAC for: %s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , id_with_mac); #line 12360 "trace/trace-hw_net.h" } else { #line 426 "../hw/net/trace-events" qemu_log("i82596_new_mac " "New MAC for: %s" "\n", id_with_mac); #line 12364 "trace/trace-hw_net.h" } } } static inline void trace_i82596_new_mac(const char * id_with_mac) { if (true) { _nocheck__trace_i82596_new_mac(id_with_mac); } } #define TRACE_I82596_SET_MULTICAST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_SET_MULTICAST) || \ false) static inline void _nocheck__trace_i82596_set_multicast(uint16_t count) { if (trace_event_get_state(TRACE_I82596_SET_MULTICAST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 427 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_set_multicast " "Added %d multicast entries" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , count); #line 12391 "trace/trace-hw_net.h" } else { #line 427 "../hw/net/trace-events" qemu_log("i82596_set_multicast " "Added %d multicast entries" "\n", count); #line 12395 "trace/trace-hw_net.h" } } } static inline void trace_i82596_set_multicast(uint16_t count) { if (true) { _nocheck__trace_i82596_set_multicast(count); } } #define TRACE_I82596_CHANNEL_ATTENTION_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_I82596_CHANNEL_ATTENTION) || \ false) static inline void _nocheck__trace_i82596_channel_attention(void * s) { if (trace_event_get_state(TRACE_I82596_CHANNEL_ATTENTION) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 428 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:i82596_channel_attention " "%p: Received CHANNEL ATTENTION" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 12422 "trace/trace-hw_net.h" } else { #line 428 "../hw/net/trace-events" qemu_log("i82596_channel_attention " "%p: Received CHANNEL ATTENTION" "\n", s); #line 12426 "trace/trace-hw_net.h" } } } static inline void trace_i82596_channel_attention(void * s) { if (true) { _nocheck__trace_i82596_channel_attention(s); } } #define TRACE_IMX_PHY_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_READ) || \ false) static inline void _nocheck__trace_imx_phy_read(uint32_t val, int phy, int reg) { if (trace_event_get_state(TRACE_IMX_PHY_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 431 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_read " "0x%04"PRIx32" <= phy[%d].reg[%d]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, phy, reg); #line 12453 "trace/trace-hw_net.h" } else { #line 431 "../hw/net/trace-events" qemu_log("imx_phy_read " "0x%04"PRIx32" <= phy[%d].reg[%d]" "\n", val, phy, reg); #line 12457 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_read(uint32_t val, int phy, int reg) { if (true) { _nocheck__trace_imx_phy_read(val, phy, reg); } } #define TRACE_IMX_PHY_READ_NUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_READ_NUM) || \ false) static inline void _nocheck__trace_imx_phy_read_num(int phy, int configured) { if (trace_event_get_state(TRACE_IMX_PHY_READ_NUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 432 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_read_num " "read request from unconfigured phy %d (configured %d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy, configured); #line 12484 "trace/trace-hw_net.h" } else { #line 432 "../hw/net/trace-events" qemu_log("imx_phy_read_num " "read request from unconfigured phy %d (configured %d)" "\n", phy, configured); #line 12488 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_read_num(int phy, int configured) { if (true) { _nocheck__trace_imx_phy_read_num(phy, configured); } } #define TRACE_IMX_PHY_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_WRITE) || \ false) static inline void _nocheck__trace_imx_phy_write(uint32_t val, int phy, int reg) { if (trace_event_get_state(TRACE_IMX_PHY_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 433 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_write " "0x%04"PRIx32" => phy[%d].reg[%d]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , val, phy, reg); #line 12515 "trace/trace-hw_net.h" } else { #line 433 "../hw/net/trace-events" qemu_log("imx_phy_write " "0x%04"PRIx32" => phy[%d].reg[%d]" "\n", val, phy, reg); #line 12519 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_write(uint32_t val, int phy, int reg) { if (true) { _nocheck__trace_imx_phy_write(val, phy, reg); } } #define TRACE_IMX_PHY_WRITE_NUM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_WRITE_NUM) || \ false) static inline void _nocheck__trace_imx_phy_write_num(int phy, int configured) { if (trace_event_get_state(TRACE_IMX_PHY_WRITE_NUM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 434 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_write_num " "write request to unconfigured phy %d (configured %d)" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , phy, configured); #line 12546 "trace/trace-hw_net.h" } else { #line 434 "../hw/net/trace-events" qemu_log("imx_phy_write_num " "write request to unconfigured phy %d (configured %d)" "\n", phy, configured); #line 12550 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_write_num(int phy, int configured) { if (true) { _nocheck__trace_imx_phy_write_num(phy, configured); } } #define TRACE_IMX_PHY_UPDATE_LINK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_UPDATE_LINK) || \ false) static inline void _nocheck__trace_imx_phy_update_link(const char * s) { if (trace_event_get_state(TRACE_IMX_PHY_UPDATE_LINK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 435 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_update_link " "%s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , s); #line 12577 "trace/trace-hw_net.h" } else { #line 435 "../hw/net/trace-events" qemu_log("imx_phy_update_link " "%s" "\n", s); #line 12581 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_update_link(const char * s) { if (true) { _nocheck__trace_imx_phy_update_link(s); } } #define TRACE_IMX_PHY_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_PHY_RESET) || \ false) static inline void _nocheck__trace_imx_phy_reset(void) { if (trace_event_get_state(TRACE_IMX_PHY_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 436 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_phy_reset " "" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 12608 "trace/trace-hw_net.h" } else { #line 436 "../hw/net/trace-events" qemu_log("imx_phy_reset " "" "\n"); #line 12612 "trace/trace-hw_net.h" } } } static inline void trace_imx_phy_reset(void) { if (true) { _nocheck__trace_imx_phy_reset(); } } #define TRACE_IMX_FEC_READ_BD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_FEC_READ_BD) || \ false) static inline void _nocheck__trace_imx_fec_read_bd(uint64_t addr, int flags, int len, int data) { if (trace_event_get_state(TRACE_IMX_FEC_READ_BD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 437 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_fec_read_bd " "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, flags, len, data); #line 12639 "trace/trace-hw_net.h" } else { #line 437 "../hw/net/trace-events" qemu_log("imx_fec_read_bd " "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x" "\n", addr, flags, len, data); #line 12643 "trace/trace-hw_net.h" } } } static inline void trace_imx_fec_read_bd(uint64_t addr, int flags, int len, int data) { if (true) { _nocheck__trace_imx_fec_read_bd(addr, flags, len, data); } } #define TRACE_IMX_ENET_READ_BD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ENET_READ_BD) || \ false) static inline void _nocheck__trace_imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) { if (trace_event_get_state(TRACE_IMX_ENET_READ_BD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 438 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_enet_read_bd " "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, flags, len, data, options, status); #line 12670 "trace/trace-hw_net.h" } else { #line 438 "../hw/net/trace-events" qemu_log("imx_enet_read_bd " "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x" "\n", addr, flags, len, data, options, status); #line 12674 "trace/trace-hw_net.h" } } } static inline void trace_imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) { if (true) { _nocheck__trace_imx_enet_read_bd(addr, flags, len, data, options, status); } } #define TRACE_IMX_ETH_TX_BD_BUSY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ETH_TX_BD_BUSY) || \ false) static inline void _nocheck__trace_imx_eth_tx_bd_busy(void) { if (trace_event_get_state(TRACE_IMX_ETH_TX_BD_BUSY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 439 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_eth_tx_bd_busy " "tx_bd ran out of descriptors to transmit" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 12701 "trace/trace-hw_net.h" } else { #line 439 "../hw/net/trace-events" qemu_log("imx_eth_tx_bd_busy " "tx_bd ran out of descriptors to transmit" "\n"); #line 12705 "trace/trace-hw_net.h" } } } static inline void trace_imx_eth_tx_bd_busy(void) { if (true) { _nocheck__trace_imx_eth_tx_bd_busy(); } } #define TRACE_IMX_ETH_RX_BD_FULL_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ETH_RX_BD_FULL) || \ false) static inline void _nocheck__trace_imx_eth_rx_bd_full(void) { if (trace_event_get_state(TRACE_IMX_ETH_RX_BD_FULL) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 440 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_eth_rx_bd_full " "RX buffer is full" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 12732 "trace/trace-hw_net.h" } else { #line 440 "../hw/net/trace-events" qemu_log("imx_eth_rx_bd_full " "RX buffer is full" "\n"); #line 12736 "trace/trace-hw_net.h" } } } static inline void trace_imx_eth_rx_bd_full(void) { if (true) { _nocheck__trace_imx_eth_rx_bd_full(); } } #define TRACE_IMX_ETH_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ETH_READ) || \ false) static inline void _nocheck__trace_imx_eth_read(int reg, const char * reg_name, uint32_t value) { if (trace_event_get_state(TRACE_IMX_ETH_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 441 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_eth_read " "reg[%d:%s] => 0x%08"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, reg_name, value); #line 12763 "trace/trace-hw_net.h" } else { #line 441 "../hw/net/trace-events" qemu_log("imx_eth_read " "reg[%d:%s] => 0x%08"PRIx32 "\n", reg, reg_name, value); #line 12767 "trace/trace-hw_net.h" } } } static inline void trace_imx_eth_read(int reg, const char * reg_name, uint32_t value) { if (true) { _nocheck__trace_imx_eth_read(reg, reg_name, value); } } #define TRACE_IMX_ETH_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ETH_WRITE) || \ false) static inline void _nocheck__trace_imx_eth_write(int reg, const char * reg_name, uint64_t value) { if (trace_event_get_state(TRACE_IMX_ETH_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 442 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_eth_write " "reg[%d:%s] <= 0x%08"PRIx64 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, reg_name, value); #line 12794 "trace/trace-hw_net.h" } else { #line 442 "../hw/net/trace-events" qemu_log("imx_eth_write " "reg[%d:%s] <= 0x%08"PRIx64 "\n", reg, reg_name, value); #line 12798 "trace/trace-hw_net.h" } } } static inline void trace_imx_eth_write(int reg, const char * reg_name, uint64_t value) { if (true) { _nocheck__trace_imx_eth_write(reg, reg_name, value); } } #define TRACE_IMX_FEC_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_FEC_RECEIVE) || \ false) static inline void _nocheck__trace_imx_fec_receive(size_t size) { if (trace_event_get_state(TRACE_IMX_FEC_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 443 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_fec_receive " "len %zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 12825 "trace/trace-hw_net.h" } else { #line 443 "../hw/net/trace-events" qemu_log("imx_fec_receive " "len %zu" "\n", size); #line 12829 "trace/trace-hw_net.h" } } } static inline void trace_imx_fec_receive(size_t size) { if (true) { _nocheck__trace_imx_fec_receive(size); } } #define TRACE_IMX_FEC_RECEIVE_LEN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_FEC_RECEIVE_LEN) || \ false) static inline void _nocheck__trace_imx_fec_receive_len(uint64_t addr, int len) { if (trace_event_get_state(TRACE_IMX_FEC_RECEIVE_LEN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 444 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_fec_receive_len " "rx_bd 0x%"PRIx64" length %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, len); #line 12856 "trace/trace-hw_net.h" } else { #line 444 "../hw/net/trace-events" qemu_log("imx_fec_receive_len " "rx_bd 0x%"PRIx64" length %d" "\n", addr, len); #line 12860 "trace/trace-hw_net.h" } } } static inline void trace_imx_fec_receive_len(uint64_t addr, int len) { if (true) { _nocheck__trace_imx_fec_receive_len(addr, len); } } #define TRACE_IMX_FEC_RECEIVE_LAST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_FEC_RECEIVE_LAST) || \ false) static inline void _nocheck__trace_imx_fec_receive_last(int last) { if (trace_event_get_state(TRACE_IMX_FEC_RECEIVE_LAST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 445 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_fec_receive_last " "rx frame flags 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , last); #line 12887 "trace/trace-hw_net.h" } else { #line 445 "../hw/net/trace-events" qemu_log("imx_fec_receive_last " "rx frame flags 0x%04x" "\n", last); #line 12891 "trace/trace-hw_net.h" } } } static inline void trace_imx_fec_receive_last(int last) { if (true) { _nocheck__trace_imx_fec_receive_last(last); } } #define TRACE_IMX_ENET_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ENET_RECEIVE) || \ false) static inline void _nocheck__trace_imx_enet_receive(size_t size) { if (trace_event_get_state(TRACE_IMX_ENET_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 446 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_enet_receive " "len %zu" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 12918 "trace/trace-hw_net.h" } else { #line 446 "../hw/net/trace-events" qemu_log("imx_enet_receive " "len %zu" "\n", size); #line 12922 "trace/trace-hw_net.h" } } } static inline void trace_imx_enet_receive(size_t size) { if (true) { _nocheck__trace_imx_enet_receive(size); } } #define TRACE_IMX_ENET_RECEIVE_LEN_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ENET_RECEIVE_LEN) || \ false) static inline void _nocheck__trace_imx_enet_receive_len(uint64_t addr, int len) { if (trace_event_get_state(TRACE_IMX_ENET_RECEIVE_LEN) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 447 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_enet_receive_len " "rx_bd 0x%"PRIx64" length %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr, len); #line 12949 "trace/trace-hw_net.h" } else { #line 447 "../hw/net/trace-events" qemu_log("imx_enet_receive_len " "rx_bd 0x%"PRIx64" length %d" "\n", addr, len); #line 12953 "trace/trace-hw_net.h" } } } static inline void trace_imx_enet_receive_len(uint64_t addr, int len) { if (true) { _nocheck__trace_imx_enet_receive_len(addr, len); } } #define TRACE_IMX_ENET_RECEIVE_LAST_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_IMX_ENET_RECEIVE_LAST) || \ false) static inline void _nocheck__trace_imx_enet_receive_last(int last) { if (trace_event_get_state(TRACE_IMX_ENET_RECEIVE_LAST) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 448 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:imx_enet_receive_last " "rx frame flags 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , last); #line 12980 "trace/trace-hw_net.h" } else { #line 448 "../hw/net/trace-events" qemu_log("imx_enet_receive_last " "rx frame flags 0x%04x" "\n", last); #line 12984 "trace/trace-hw_net.h" } } } static inline void trace_imx_enet_receive_last(int last) { if (true) { _nocheck__trace_imx_enet_receive_last(last); } } #define TRACE_NPCM7XX_EMC_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_RESET) || \ false) static inline void _nocheck__trace_npcm7xx_emc_reset(int emc_num) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 451 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_reset " "Resetting emc%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , emc_num); #line 13011 "trace/trace-hw_net.h" } else { #line 451 "../hw/net/trace-events" qemu_log("npcm7xx_emc_reset " "Resetting emc%d" "\n", emc_num); #line 13015 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_reset(int emc_num) { if (true) { _nocheck__trace_npcm7xx_emc_reset(emc_num); } } #define TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ) || \ false) static inline void _nocheck__trace_npcm7xx_emc_update_tx_irq(int level) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_UPDATE_TX_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 452 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_update_tx_irq " "Setting tx irq to %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , level); #line 13042 "trace/trace-hw_net.h" } else { #line 452 "../hw/net/trace-events" qemu_log("npcm7xx_emc_update_tx_irq " "Setting tx irq to %d" "\n", level); #line 13046 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_update_tx_irq(int level) { if (true) { _nocheck__trace_npcm7xx_emc_update_tx_irq(level); } } #define TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ) || \ false) static inline void _nocheck__trace_npcm7xx_emc_update_rx_irq(int level) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_UPDATE_RX_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 453 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_update_rx_irq " "Setting rx irq to %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , level); #line 13073 "trace/trace-hw_net.h" } else { #line 453 "../hw/net/trace-events" qemu_log("npcm7xx_emc_update_rx_irq " "Setting rx irq to %d" "\n", level); #line 13077 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_update_rx_irq(int level) { if (true) { _nocheck__trace_npcm7xx_emc_update_rx_irq(level); } } #define TRACE_NPCM7XX_EMC_SET_MISTA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_SET_MISTA) || \ false) static inline void _nocheck__trace_npcm7xx_emc_set_mista(uint32_t flags) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_SET_MISTA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 454 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_set_mista " "ORing 0x%x into MISTA" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , flags); #line 13104 "trace/trace-hw_net.h" } else { #line 454 "../hw/net/trace-events" qemu_log("npcm7xx_emc_set_mista " "ORing 0x%x into MISTA" "\n", flags); #line 13108 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_set_mista(uint32_t flags) { if (true) { _nocheck__trace_npcm7xx_emc_set_mista(flags); } } #define TRACE_NPCM7XX_EMC_CPU_OWNED_DESC_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_CPU_OWNED_DESC) || \ false) static inline void _nocheck__trace_npcm7xx_emc_cpu_owned_desc(uint32_t addr) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_CPU_OWNED_DESC) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 455 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_cpu_owned_desc " "Can't process cpu-owned descriptor @0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , addr); #line 13135 "trace/trace-hw_net.h" } else { #line 455 "../hw/net/trace-events" qemu_log("npcm7xx_emc_cpu_owned_desc " "Can't process cpu-owned descriptor @0x%x" "\n", addr); #line 13139 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_cpu_owned_desc(uint32_t addr) { if (true) { _nocheck__trace_npcm7xx_emc_cpu_owned_desc(addr); } } #define TRACE_NPCM7XX_EMC_SENT_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_SENT_PACKET) || \ false) static inline void _nocheck__trace_npcm7xx_emc_sent_packet(uint32_t len) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_SENT_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 456 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_sent_packet " "Sent %u byte packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 13166 "trace/trace-hw_net.h" } else { #line 456 "../hw/net/trace-events" qemu_log("npcm7xx_emc_sent_packet " "Sent %u byte packet" "\n", len); #line 13170 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_sent_packet(uint32_t len) { if (true) { _nocheck__trace_npcm7xx_emc_sent_packet(len); } } #define TRACE_NPCM7XX_EMC_TX_DONE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_TX_DONE) || \ false) static inline void _nocheck__trace_npcm7xx_emc_tx_done(uint32_t ctxdsa) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_TX_DONE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 457 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_tx_done " "TX done, CTXDSA=0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ctxdsa); #line 13197 "trace/trace-hw_net.h" } else { #line 457 "../hw/net/trace-events" qemu_log("npcm7xx_emc_tx_done " "TX done, CTXDSA=0x%x" "\n", ctxdsa); #line 13201 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_tx_done(uint32_t ctxdsa) { if (true) { _nocheck__trace_npcm7xx_emc_tx_done(ctxdsa); } } #define TRACE_NPCM7XX_EMC_CAN_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_CAN_RECEIVE) || \ false) static inline void _nocheck__trace_npcm7xx_emc_can_receive(int can_receive) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_CAN_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 458 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_can_receive " "Can receive: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , can_receive); #line 13228 "trace/trace-hw_net.h" } else { #line 458 "../hw/net/trace-events" qemu_log("npcm7xx_emc_can_receive " "Can receive: %d" "\n", can_receive); #line 13232 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_can_receive(int can_receive) { if (true) { _nocheck__trace_npcm7xx_emc_can_receive(can_receive); } } #define TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT) || \ false) static inline void _nocheck__trace_npcm7xx_emc_packet_filtered_out(const char* fail_reason) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_PACKET_FILTERED_OUT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 459 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_packet_filtered_out " "Packet filtered out: %s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , fail_reason); #line 13259 "trace/trace-hw_net.h" } else { #line 459 "../hw/net/trace-events" qemu_log("npcm7xx_emc_packet_filtered_out " "Packet filtered out: %s" "\n", fail_reason); #line 13263 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_packet_filtered_out(const char* fail_reason) { if (true) { _nocheck__trace_npcm7xx_emc_packet_filtered_out(fail_reason); } } #define TRACE_NPCM7XX_EMC_PACKET_DROPPED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_PACKET_DROPPED) || \ false) static inline void _nocheck__trace_npcm7xx_emc_packet_dropped(uint32_t len) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_PACKET_DROPPED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 460 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_packet_dropped " "%u byte packet dropped" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 13290 "trace/trace-hw_net.h" } else { #line 460 "../hw/net/trace-events" qemu_log("npcm7xx_emc_packet_dropped " "%u byte packet dropped" "\n", len); #line 13294 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_packet_dropped(uint32_t len) { if (true) { _nocheck__trace_npcm7xx_emc_packet_dropped(len); } } #define TRACE_NPCM7XX_EMC_RECEIVING_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_RECEIVING_PACKET) || \ false) static inline void _nocheck__trace_npcm7xx_emc_receiving_packet(uint32_t len) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_RECEIVING_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 461 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_receiving_packet " "Receiving %u byte packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 13321 "trace/trace-hw_net.h" } else { #line 461 "../hw/net/trace-events" qemu_log("npcm7xx_emc_receiving_packet " "Receiving %u byte packet" "\n", len); #line 13325 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_receiving_packet(uint32_t len) { if (true) { _nocheck__trace_npcm7xx_emc_receiving_packet(len); } } #define TRACE_NPCM7XX_EMC_RECEIVED_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_RECEIVED_PACKET) || \ false) static inline void _nocheck__trace_npcm7xx_emc_received_packet(uint32_t len) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_RECEIVED_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 462 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_received_packet " "Received %u byte packet" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 13352 "trace/trace-hw_net.h" } else { #line 462 "../hw/net/trace-events" qemu_log("npcm7xx_emc_received_packet " "Received %u byte packet" "\n", len); #line 13356 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_received_packet(uint32_t len) { if (true) { _nocheck__trace_npcm7xx_emc_received_packet(len); } } #define TRACE_NPCM7XX_EMC_RX_DONE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_RX_DONE) || \ false) static inline void _nocheck__trace_npcm7xx_emc_rx_done(uint32_t crxdsa) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_RX_DONE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 463 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_rx_done " "RX done, CRXDSA=0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , crxdsa); #line 13383 "trace/trace-hw_net.h" } else { #line 463 "../hw/net/trace-events" qemu_log("npcm7xx_emc_rx_done " "RX done, CRXDSA=0x%x" "\n", crxdsa); #line 13387 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_rx_done(uint32_t crxdsa) { if (true) { _nocheck__trace_npcm7xx_emc_rx_done(crxdsa); } } #define TRACE_NPCM7XX_EMC_REG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_REG_READ) || \ false) static inline void _nocheck__trace_npcm7xx_emc_reg_read(int emc_num, uint32_t result, const char * name, int regno) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 464 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_reg_read " "emc%d: 0x%x = reg[%s/%d]" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , emc_num, result, name, regno); #line 13414 "trace/trace-hw_net.h" } else { #line 464 "../hw/net/trace-events" qemu_log("npcm7xx_emc_reg_read " "emc%d: 0x%x = reg[%s/%d]" "\n", emc_num, result, name, regno); #line 13418 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_reg_read(int emc_num, uint32_t result, const char * name, int regno) { if (true) { _nocheck__trace_npcm7xx_emc_reg_read(emc_num, result, name, regno); } } #define TRACE_NPCM7XX_EMC_REG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM7XX_EMC_REG_WRITE) || \ false) static inline void _nocheck__trace_npcm7xx_emc_reg_write(int emc_num, const char * name, int regno, uint32_t value) { if (trace_event_get_state(TRACE_NPCM7XX_EMC_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 465 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm7xx_emc_reg_write " "emc%d: reg[%s/%d] = 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , emc_num, name, regno, value); #line 13445 "trace/trace-hw_net.h" } else { #line 465 "../hw/net/trace-events" qemu_log("npcm7xx_emc_reg_write " "emc%d: reg[%s/%d] = 0x%x" "\n", emc_num, name, regno, value); #line 13449 "trace/trace-hw_net.h" } } } static inline void trace_npcm7xx_emc_reg_write(int emc_num, const char * name, int regno, uint32_t value) { if (true) { _nocheck__trace_npcm7xx_emc_reg_write(emc_num, name, regno, value); } } #define TRACE_NPCM_GMAC_REG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_REG_READ) || \ false) static inline void _nocheck__trace_npcm_gmac_reg_read(const char * name, uint64_t offset, uint32_t value) { if (trace_event_get_state(TRACE_NPCM_GMAC_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 468 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_reg_read " "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, offset, value); #line 13476 "trace/trace-hw_net.h" } else { #line 468 "../hw/net/trace-events" qemu_log("npcm_gmac_reg_read " "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx32 "\n", name, offset, value); #line 13480 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_reg_read(const char * name, uint64_t offset, uint32_t value) { if (true) { _nocheck__trace_npcm_gmac_reg_read(name, offset, value); } } #define TRACE_NPCM_GMAC_REG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_REG_WRITE) || \ false) static inline void _nocheck__trace_npcm_gmac_reg_write(const char * name, uint64_t offset, uint32_t value) { if (trace_event_get_state(TRACE_NPCM_GMAC_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 469 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_reg_write " "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, offset, value); #line 13507 "trace/trace-hw_net.h" } else { #line 469 "../hw/net/trace-events" qemu_log("npcm_gmac_reg_write " "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx32 "\n", name, offset, value); #line 13511 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_reg_write(const char * name, uint64_t offset, uint32_t value) { if (true) { _nocheck__trace_npcm_gmac_reg_write(name, offset, value); } } #define TRACE_NPCM_GMAC_MDIO_ACCESS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_MDIO_ACCESS) || \ false) static inline void _nocheck__trace_npcm_gmac_mdio_access(const char * name, uint8_t is_write, uint8_t pa, uint8_t gr, uint16_t val) { if (trace_event_get_state(TRACE_NPCM_GMAC_MDIO_ACCESS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 470 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_mdio_access " "%s: is_write: %" PRIu8 " pa: %" PRIu8 " gr: %" PRIu8 " val: 0x%04" PRIx16 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, is_write, pa, gr, val); #line 13538 "trace/trace-hw_net.h" } else { #line 470 "../hw/net/trace-events" qemu_log("npcm_gmac_mdio_access " "%s: is_write: %" PRIu8 " pa: %" PRIu8 " gr: %" PRIu8 " val: 0x%04" PRIx16 "\n", name, is_write, pa, gr, val); #line 13542 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_mdio_access(const char * name, uint8_t is_write, uint8_t pa, uint8_t gr, uint16_t val) { if (true) { _nocheck__trace_npcm_gmac_mdio_access(name, is_write, pa, gr, val); } } #define TRACE_NPCM_GMAC_RESET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_RESET) || \ false) static inline void _nocheck__trace_npcm_gmac_reset(const char * name, uint16_t value) { if (trace_event_get_state(TRACE_NPCM_GMAC_RESET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 471 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_reset " "%s: phy_regs[0][1]: 0x%04" PRIx16 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, value); #line 13569 "trace/trace-hw_net.h" } else { #line 471 "../hw/net/trace-events" qemu_log("npcm_gmac_reset " "%s: phy_regs[0][1]: 0x%04" PRIx16 "\n", name, value); #line 13573 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_reset(const char * name, uint16_t value) { if (true) { _nocheck__trace_npcm_gmac_reset(name, value); } } #define TRACE_NPCM_GMAC_SET_LINK_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_SET_LINK) || \ false) static inline void _nocheck__trace_npcm_gmac_set_link(bool active) { if (trace_event_get_state(TRACE_NPCM_GMAC_SET_LINK) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 472 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_set_link " "Set link: active=%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , active); #line 13600 "trace/trace-hw_net.h" } else { #line 472 "../hw/net/trace-events" qemu_log("npcm_gmac_set_link " "Set link: active=%u" "\n", active); #line 13604 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_set_link(bool active) { if (true) { _nocheck__trace_npcm_gmac_set_link(active); } } #define TRACE_NPCM_GMAC_UPDATE_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_UPDATE_IRQ) || \ false) static inline void _nocheck__trace_npcm_gmac_update_irq(const char * name, uint32_t status, uint32_t intr_en, int level) { if (trace_event_get_state(TRACE_NPCM_GMAC_UPDATE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 473 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_update_irq " "%s: Status Reg: 0x%04" PRIX32 " Interrupt Enable Reg: 0x%04" PRIX32 " IRQ Set: %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, status, intr_en, level); #line 13631 "trace/trace-hw_net.h" } else { #line 473 "../hw/net/trace-events" qemu_log("npcm_gmac_update_irq " "%s: Status Reg: 0x%04" PRIX32 " Interrupt Enable Reg: 0x%04" PRIX32 " IRQ Set: %d" "\n", name, status, intr_en, level); #line 13635 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_update_irq(const char * name, uint32_t status, uint32_t intr_en, int level) { if (true) { _nocheck__trace_npcm_gmac_update_irq(name, status, intr_en, level); } } #define TRACE_NPCM_GMAC_PACKET_DESC_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_DESC_READ) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_desc_read(const char* name, uint32_t desc_addr) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_DESC_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 474 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_desc_read " "%s: attempting to read descriptor @0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, desc_addr); #line 13662 "trace/trace-hw_net.h" } else { #line 474 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_desc_read " "%s: attempting to read descriptor @0x%04" PRIX32 "\n", name, desc_addr); #line 13666 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_desc_read(const char* name, uint32_t desc_addr) { if (true) { _nocheck__trace_npcm_gmac_packet_desc_read(name, desc_addr); } } #define TRACE_NPCM_GMAC_PACKET_RECEIVE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_RECEIVE) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_receive(const char* name, uint32_t len) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_RECEIVE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 475 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_receive " "%s: RX packet length: 0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, len); #line 13693 "trace/trace-hw_net.h" } else { #line 475 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_receive " "%s: RX packet length: 0x%04" PRIX32 "\n", name, len); #line 13697 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_receive(const char* name, uint32_t len) { if (true) { _nocheck__trace_npcm_gmac_packet_receive(name, len); } } #define TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_receiving_buffer(const char* name, uint32_t buf_len, uint32_t rx_buf_addr) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_RECEIVING_BUFFER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 476 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_receiving_buffer " "%s: Receiving into Buffer size: 0x%04" PRIX32 " at address 0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, buf_len, rx_buf_addr); #line 13724 "trace/trace-hw_net.h" } else { #line 476 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_receiving_buffer " "%s: Receiving into Buffer size: 0x%04" PRIX32 " at address 0x%04" PRIX32 "\n", name, buf_len, rx_buf_addr); #line 13728 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_receiving_buffer(const char* name, uint32_t buf_len, uint32_t rx_buf_addr) { if (true) { _nocheck__trace_npcm_gmac_packet_receiving_buffer(name, buf_len, rx_buf_addr); } } #define TRACE_NPCM_GMAC_PACKET_RECEIVED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_RECEIVED) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_received(const char* name, uint32_t len) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_RECEIVED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 477 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_received " "%s: Reception finished, packet left: 0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, len); #line 13755 "trace/trace-hw_net.h" } else { #line 477 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_received " "%s: Reception finished, packet left: 0x%04" PRIX32 "\n", name, len); #line 13759 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_received(const char* name, uint32_t len) { if (true) { _nocheck__trace_npcm_gmac_packet_received(name, len); } } #define TRACE_NPCM_GMAC_PACKET_SENT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_SENT) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_sent(const char* name, uint16_t len) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_SENT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 478 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_sent " "%s: TX packet sent!, length: 0x%04" PRIX16 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, len); #line 13786 "trace/trace-hw_net.h" } else { #line 478 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_sent " "%s: TX packet sent!, length: 0x%04" PRIX16 "\n", name, len); #line 13790 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_sent(const char* name, uint16_t len) { if (true) { _nocheck__trace_npcm_gmac_packet_sent(name, len); } } #define TRACE_NPCM_GMAC_DEBUG_DESC_DATA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_DEBUG_DESC_DATA) || \ false) static inline void _nocheck__trace_npcm_gmac_debug_desc_data(const char* name, void* addr, uint32_t des0, uint32_t des1, uint32_t des2, uint32_t des3) { if (trace_event_get_state(TRACE_NPCM_GMAC_DEBUG_DESC_DATA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 479 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_debug_desc_data " "%s: Address: %p Descriptor 0: 0x%04" PRIX32 " Descriptor 1: 0x%04" PRIX32 "Descriptor 2: 0x%04" PRIX32 " Descriptor 3: 0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, addr, des0, des1, des2, des3); #line 13817 "trace/trace-hw_net.h" } else { #line 479 "../hw/net/trace-events" qemu_log("npcm_gmac_debug_desc_data " "%s: Address: %p Descriptor 0: 0x%04" PRIX32 " Descriptor 1: 0x%04" PRIX32 "Descriptor 2: 0x%04" PRIX32 " Descriptor 3: 0x%04" PRIX32 "\n", name, addr, des0, des1, des2, des3); #line 13821 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_debug_desc_data(const char* name, void* addr, uint32_t des0, uint32_t des1, uint32_t des2, uint32_t des3) { if (true) { _nocheck__trace_npcm_gmac_debug_desc_data(name, addr, des0, des1, des2, des3); } } #define TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA) || \ false) static inline void _nocheck__trace_npcm_gmac_packet_tx_desc_data(const char* name, uint32_t tdes0, uint32_t tdes1) { if (trace_event_get_state(TRACE_NPCM_GMAC_PACKET_TX_DESC_DATA) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 480 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_packet_tx_desc_data " "%s: Tdes0: 0x%04" PRIX32 " Tdes1: 0x%04" PRIX32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, tdes0, tdes1); #line 13848 "trace/trace-hw_net.h" } else { #line 480 "../hw/net/trace-events" qemu_log("npcm_gmac_packet_tx_desc_data " "%s: Tdes0: 0x%04" PRIX32 " Tdes1: 0x%04" PRIX32 "\n", name, tdes0, tdes1); #line 13852 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_packet_tx_desc_data(const char* name, uint32_t tdes0, uint32_t tdes1) { if (true) { _nocheck__trace_npcm_gmac_packet_tx_desc_data(name, tdes0, tdes1); } } #define TRACE_NPCM_GMAC_TX_DESC_OWNER_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_GMAC_TX_DESC_OWNER) || \ false) static inline void _nocheck__trace_npcm_gmac_tx_desc_owner(const char* name, uint32_t desc_addr) { if (trace_event_get_state(TRACE_NPCM_GMAC_TX_DESC_OWNER) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 481 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_gmac_tx_desc_owner " "%s: TX Descriptor @0x%04" PRIX32 " is owned by software" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, desc_addr); #line 13879 "trace/trace-hw_net.h" } else { #line 481 "../hw/net/trace-events" qemu_log("npcm_gmac_tx_desc_owner " "%s: TX Descriptor @0x%04" PRIX32 " is owned by software" "\n", name, desc_addr); #line 13883 "trace/trace-hw_net.h" } } } static inline void trace_npcm_gmac_tx_desc_owner(const char* name, uint32_t desc_addr) { if (true) { _nocheck__trace_npcm_gmac_tx_desc_owner(name, desc_addr); } } #define TRACE_NPCM_PCS_REG_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_PCS_REG_READ) || \ false) static inline void _nocheck__trace_npcm_pcs_reg_read(const char * name, uint16_t indirect_access_baes, uint64_t offset, uint16_t value) { if (trace_event_get_state(TRACE_NPCM_PCS_REG_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 484 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_pcs_reg_read " "%s: IND: 0x%02" PRIx16 " offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, indirect_access_baes, offset, value); #line 13910 "trace/trace-hw_net.h" } else { #line 484 "../hw/net/trace-events" qemu_log("npcm_pcs_reg_read " "%s: IND: 0x%02" PRIx16 " offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 "\n", name, indirect_access_baes, offset, value); #line 13914 "trace/trace-hw_net.h" } } } static inline void trace_npcm_pcs_reg_read(const char * name, uint16_t indirect_access_baes, uint64_t offset, uint16_t value) { if (true) { _nocheck__trace_npcm_pcs_reg_read(name, indirect_access_baes, offset, value); } } #define TRACE_NPCM_PCS_REG_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_NPCM_PCS_REG_WRITE) || \ false) static inline void _nocheck__trace_npcm_pcs_reg_write(const char * name, uint16_t indirect_access_baes, uint64_t offset, uint16_t value) { if (trace_event_get_state(TRACE_NPCM_PCS_REG_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 485 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:npcm_pcs_reg_write " "%s: IND: 0x%02" PRIx16 " offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name, indirect_access_baes, offset, value); #line 13941 "trace/trace-hw_net.h" } else { #line 485 "../hw/net/trace-events" qemu_log("npcm_pcs_reg_write " "%s: IND: 0x%02" PRIx16 " offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 "\n", name, indirect_access_baes, offset, value); #line 13945 "trace/trace-hw_net.h" } } } static inline void trace_npcm_pcs_reg_write(const char * name, uint16_t indirect_access_baes, uint64_t offset, uint16_t value) { if (true) { _nocheck__trace_npcm_pcs_reg_write(name, indirect_access_baes, offset, value); } } #define TRACE_DP8393X_RAISE_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_RAISE_IRQ) || \ false) static inline void _nocheck__trace_dp8393x_raise_irq(int isr) { if (trace_event_get_state(TRACE_DP8393X_RAISE_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 488 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_raise_irq " "raise irq, isr is 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , isr); #line 13972 "trace/trace-hw_net.h" } else { #line 488 "../hw/net/trace-events" qemu_log("dp8393x_raise_irq " "raise irq, isr is 0x%04x" "\n", isr); #line 13976 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_raise_irq(int isr) { if (true) { _nocheck__trace_dp8393x_raise_irq(isr); } } #define TRACE_DP8393X_LOWER_IRQ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_LOWER_IRQ) || \ false) static inline void _nocheck__trace_dp8393x_lower_irq(void) { if (trace_event_get_state(TRACE_DP8393X_LOWER_IRQ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 489 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_lower_irq " "lower irq" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 14003 "trace/trace-hw_net.h" } else { #line 489 "../hw/net/trace-events" qemu_log("dp8393x_lower_irq " "lower irq" "\n"); #line 14007 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_lower_irq(void) { if (true) { _nocheck__trace_dp8393x_lower_irq(); } } #define TRACE_DP8393X_LOAD_CAM_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_LOAD_CAM) || \ false) static inline void _nocheck__trace_dp8393x_load_cam(int idx, int cam0, int cam1, int cam2, int cam3, int cam4, int cam5) { if (trace_event_get_state(TRACE_DP8393X_LOAD_CAM) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 490 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_load_cam " "load cam[%d] with 0x%02x0x%02x0x%02x0x%02x0x%02x0x%02x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , idx, cam0, cam1, cam2, cam3, cam4, cam5); #line 14034 "trace/trace-hw_net.h" } else { #line 490 "../hw/net/trace-events" qemu_log("dp8393x_load_cam " "load cam[%d] with 0x%02x0x%02x0x%02x0x%02x0x%02x0x%02x" "\n", idx, cam0, cam1, cam2, cam3, cam4, cam5); #line 14038 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_load_cam(int idx, int cam0, int cam1, int cam2, int cam3, int cam4, int cam5) { if (true) { _nocheck__trace_dp8393x_load_cam(idx, cam0, cam1, cam2, cam3, cam4, cam5); } } #define TRACE_DP8393X_LOAD_CAM_DONE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_LOAD_CAM_DONE) || \ false) static inline void _nocheck__trace_dp8393x_load_cam_done(int cen) { if (trace_event_get_state(TRACE_DP8393X_LOAD_CAM_DONE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 491 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_load_cam_done " "load cam done. cam enable mask 0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , cen); #line 14065 "trace/trace-hw_net.h" } else { #line 491 "../hw/net/trace-events" qemu_log("dp8393x_load_cam_done " "load cam done. cam enable mask 0x%04x" "\n", cen); #line 14069 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_load_cam_done(int cen) { if (true) { _nocheck__trace_dp8393x_load_cam_done(cen); } } #define TRACE_DP8393X_READ_RRA_REGS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_READ_RRA_REGS) || \ false) static inline void _nocheck__trace_dp8393x_read_rra_regs(int crba0, int crba1, int rbwc0, int rbwc1) { if (trace_event_get_state(TRACE_DP8393X_READ_RRA_REGS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 492 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_read_rra_regs " "CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , crba0, crba1, rbwc0, rbwc1); #line 14096 "trace/trace-hw_net.h" } else { #line 492 "../hw/net/trace-events" qemu_log("dp8393x_read_rra_regs " "CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x" "\n", crba0, crba1, rbwc0, rbwc1); #line 14100 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_read_rra_regs(int crba0, int crba1, int rbwc0, int rbwc1) { if (true) { _nocheck__trace_dp8393x_read_rra_regs(crba0, crba1, rbwc0, rbwc1); } } #define TRACE_DP8393X_TRANSMIT_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_TRANSMIT_PACKET) || \ false) static inline void _nocheck__trace_dp8393x_transmit_packet(int ttda) { if (trace_event_get_state(TRACE_DP8393X_TRANSMIT_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 493 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_transmit_packet " "Transmit packet at 0x%"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , ttda); #line 14127 "trace/trace-hw_net.h" } else { #line 493 "../hw/net/trace-events" qemu_log("dp8393x_transmit_packet " "Transmit packet at 0x%"PRIx32 "\n", ttda); #line 14131 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_transmit_packet(int ttda) { if (true) { _nocheck__trace_dp8393x_transmit_packet(ttda); } } #define TRACE_DP8393X_TRANSMIT_TXLEN_ERROR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_TRANSMIT_TXLEN_ERROR) || \ false) static inline void _nocheck__trace_dp8393x_transmit_txlen_error(int len) { if (trace_event_get_state(TRACE_DP8393X_TRANSMIT_TXLEN_ERROR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 494 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_transmit_txlen_error " "tx_len is %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , len); #line 14158 "trace/trace-hw_net.h" } else { #line 494 "../hw/net/trace-events" qemu_log("dp8393x_transmit_txlen_error " "tx_len is %d" "\n", len); #line 14162 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_transmit_txlen_error(int len) { if (true) { _nocheck__trace_dp8393x_transmit_txlen_error(len); } } #define TRACE_DP8393X_READ_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_READ) || \ false) static inline void _nocheck__trace_dp8393x_read(int reg, const char * name, int val, int size) { if (trace_event_get_state(TRACE_DP8393X_READ) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 495 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_read " "reg=0x%x [%s] val=0x%04x size=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, name, val, size); #line 14189 "trace/trace-hw_net.h" } else { #line 495 "../hw/net/trace-events" qemu_log("dp8393x_read " "reg=0x%x [%s] val=0x%04x size=%d" "\n", reg, name, val, size); #line 14193 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_read(int reg, const char * name, int val, int size) { if (true) { _nocheck__trace_dp8393x_read(reg, name, val, size); } } #define TRACE_DP8393X_WRITE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_WRITE) || \ false) static inline void _nocheck__trace_dp8393x_write(int reg, const char * name, int val, int size) { if (trace_event_get_state(TRACE_DP8393X_WRITE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 496 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_write " "reg=0x%x [%s] val=0x%04x size=%d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg, name, val, size); #line 14220 "trace/trace-hw_net.h" } else { #line 496 "../hw/net/trace-events" qemu_log("dp8393x_write " "reg=0x%x [%s] val=0x%04x size=%d" "\n", reg, name, val, size); #line 14224 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_write(int reg, const char * name, int val, int size) { if (true) { _nocheck__trace_dp8393x_write(reg, name, val, size); } } #define TRACE_DP8393X_WRITE_INVALID_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_WRITE_INVALID) || \ false) static inline void _nocheck__trace_dp8393x_write_invalid(int reg) { if (trace_event_get_state(TRACE_DP8393X_WRITE_INVALID) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 497 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_write_invalid " "writing to reg %d invalid" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , reg); #line 14251 "trace/trace-hw_net.h" } else { #line 497 "../hw/net/trace-events" qemu_log("dp8393x_write_invalid " "writing to reg %d invalid" "\n", reg); #line 14255 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_write_invalid(int reg) { if (true) { _nocheck__trace_dp8393x_write_invalid(reg); } } #define TRACE_DP8393X_WRITE_INVALID_DCR_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_WRITE_INVALID_DCR) || \ false) static inline void _nocheck__trace_dp8393x_write_invalid_dcr(const char * name) { if (trace_event_get_state(TRACE_DP8393X_WRITE_INVALID_DCR) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 498 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_write_invalid_dcr " "writing to %s invalid" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , name); #line 14282 "trace/trace-hw_net.h" } else { #line 498 "../hw/net/trace-events" qemu_log("dp8393x_write_invalid_dcr " "writing to %s invalid" "\n", name); #line 14286 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_write_invalid_dcr(const char * name) { if (true) { _nocheck__trace_dp8393x_write_invalid_dcr(name); } } #define TRACE_DP8393X_RECEIVE_OVERSIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_RECEIVE_OVERSIZE) || \ false) static inline void _nocheck__trace_dp8393x_receive_oversize(int size) { if (trace_event_get_state(TRACE_DP8393X_RECEIVE_OVERSIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 499 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_receive_oversize " "oversize packet, pkt_size is %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , size); #line 14313 "trace/trace-hw_net.h" } else { #line 499 "../hw/net/trace-events" qemu_log("dp8393x_receive_oversize " "oversize packet, pkt_size is %d" "\n", size); #line 14317 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_receive_oversize(int size) { if (true) { _nocheck__trace_dp8393x_receive_oversize(size); } } #define TRACE_DP8393X_RECEIVE_NOT_NETCARD_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_RECEIVE_NOT_NETCARD) || \ false) static inline void _nocheck__trace_dp8393x_receive_not_netcard(void) { if (trace_event_get_state(TRACE_DP8393X_RECEIVE_NOT_NETCARD) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 500 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_receive_not_netcard " "packet not for netcard" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec ); #line 14344 "trace/trace-hw_net.h" } else { #line 500 "../hw/net/trace-events" qemu_log("dp8393x_receive_not_netcard " "packet not for netcard" "\n"); #line 14348 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_receive_not_netcard(void) { if (true) { _nocheck__trace_dp8393x_receive_not_netcard(); } } #define TRACE_DP8393X_RECEIVE_PACKET_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_RECEIVE_PACKET) || \ false) static inline void _nocheck__trace_dp8393x_receive_packet(int crba) { if (trace_event_get_state(TRACE_DP8393X_RECEIVE_PACKET) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 501 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_receive_packet " "Receive packet at 0x%"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , crba); #line 14375 "trace/trace-hw_net.h" } else { #line 501 "../hw/net/trace-events" qemu_log("dp8393x_receive_packet " "Receive packet at 0x%"PRIx32 "\n", crba); #line 14379 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_receive_packet(int crba) { if (true) { _nocheck__trace_dp8393x_receive_packet(crba); } } #define TRACE_DP8393X_RECEIVE_WRITE_STATUS_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_DP8393X_RECEIVE_WRITE_STATUS) || \ false) static inline void _nocheck__trace_dp8393x_receive_write_status(int crba) { if (trace_event_get_state(TRACE_DP8393X_RECEIVE_WRITE_STATUS) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 502 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:dp8393x_receive_write_status " "Write status at 0x%"PRIx32 "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , crba); #line 14406 "trace/trace-hw_net.h" } else { #line 502 "../hw/net/trace-events" qemu_log("dp8393x_receive_write_status " "Write status at 0x%"PRIx32 "\n", crba); #line 14410 "trace/trace-hw_net.h" } } } static inline void trace_dp8393x_receive_write_status(int crba) { if (true) { _nocheck__trace_dp8393x_receive_write_status(crba); } } #define TRACE_XEN_NETDEV_REALIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_REALIZE) || \ false) static inline void _nocheck__trace_xen_netdev_realize(int dev, const char * info, const char * peer) { if (trace_event_get_state(TRACE_XEN_NETDEV_REALIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 505 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_realize " "vif%u info '%s' peer '%s'" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev, info, peer); #line 14437 "trace/trace-hw_net.h" } else { #line 505 "../hw/net/trace-events" qemu_log("xen_netdev_realize " "vif%u info '%s' peer '%s'" "\n", dev, info, peer); #line 14441 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_realize(int dev, const char * info, const char * peer) { if (true) { _nocheck__trace_xen_netdev_realize(dev, info, peer); } } #define TRACE_XEN_NETDEV_UNREALIZE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_UNREALIZE) || \ false) static inline void _nocheck__trace_xen_netdev_unrealize(int dev) { if (trace_event_get_state(TRACE_XEN_NETDEV_UNREALIZE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 506 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_unrealize " "vif%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev); #line 14468 "trace/trace-hw_net.h" } else { #line 506 "../hw/net/trace-events" qemu_log("xen_netdev_unrealize " "vif%u" "\n", dev); #line 14472 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_unrealize(int dev) { if (true) { _nocheck__trace_xen_netdev_unrealize(dev); } } #define TRACE_XEN_NETDEV_CREATE_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_CREATE) || \ false) static inline void _nocheck__trace_xen_netdev_create(int dev) { if (trace_event_get_state(TRACE_XEN_NETDEV_CREATE) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 507 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_create " "vif%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev); #line 14499 "trace/trace-hw_net.h" } else { #line 507 "../hw/net/trace-events" qemu_log("xen_netdev_create " "vif%u" "\n", dev); #line 14503 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_create(int dev) { if (true) { _nocheck__trace_xen_netdev_create(dev); } } #define TRACE_XEN_NETDEV_DESTROY_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_DESTROY) || \ false) static inline void _nocheck__trace_xen_netdev_destroy(int dev) { if (trace_event_get_state(TRACE_XEN_NETDEV_DESTROY) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 508 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_destroy " "vif%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev); #line 14530 "trace/trace-hw_net.h" } else { #line 508 "../hw/net/trace-events" qemu_log("xen_netdev_destroy " "vif%u" "\n", dev); #line 14534 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_destroy(int dev) { if (true) { _nocheck__trace_xen_netdev_destroy(dev); } } #define TRACE_XEN_NETDEV_DISCONNECT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_DISCONNECT) || \ false) static inline void _nocheck__trace_xen_netdev_disconnect(int dev) { if (trace_event_get_state(TRACE_XEN_NETDEV_DISCONNECT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 509 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_disconnect " "vif%u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev); #line 14561 "trace/trace-hw_net.h" } else { #line 509 "../hw/net/trace-events" qemu_log("xen_netdev_disconnect " "vif%u" "\n", dev); #line 14565 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_disconnect(int dev) { if (true) { _nocheck__trace_xen_netdev_disconnect(dev); } } #define TRACE_XEN_NETDEV_CONNECT_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_CONNECT) || \ false) static inline void _nocheck__trace_xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) { if (trace_event_get_state(TRACE_XEN_NETDEV_CONNECT) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 510 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_connect " "vif%u tx %u rx %u port %u" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev, tx, rx, port); #line 14592 "trace/trace-hw_net.h" } else { #line 510 "../hw/net/trace-events" qemu_log("xen_netdev_connect " "vif%u tx %u rx %u port %u" "\n", dev, tx, rx, port); #line 14596 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) { if (true) { _nocheck__trace_xen_netdev_connect(dev, tx, rx, port); } } #define TRACE_XEN_NETDEV_FRONTEND_CHANGED_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_FRONTEND_CHANGED) || \ false) static inline void _nocheck__trace_xen_netdev_frontend_changed(const char * dev, int state) { if (trace_event_get_state(TRACE_XEN_NETDEV_FRONTEND_CHANGED) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 511 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_frontend_changed " "vif%s state %d" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev, state); #line 14623 "trace/trace-hw_net.h" } else { #line 511 "../hw/net/trace-events" qemu_log("xen_netdev_frontend_changed " "vif%s state %d" "\n", dev, state); #line 14627 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_frontend_changed(const char * dev, int state) { if (true) { _nocheck__trace_xen_netdev_frontend_changed(dev, state); } } #define TRACE_XEN_NETDEV_TX_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_TX) || \ false) static inline void _nocheck__trace_xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char * c, const char * d, const char * m, const char * e) { if (trace_event_get_state(TRACE_XEN_NETDEV_TX) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 512 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_tx " "vif%u ref %u off %u len %u flags 0x%x%s%s%s%s" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev, ref, off, len, flags, c, d, m, e); #line 14654 "trace/trace-hw_net.h" } else { #line 512 "../hw/net/trace-events" qemu_log("xen_netdev_tx " "vif%u ref %u off %u len %u flags 0x%x%s%s%s%s" "\n", dev, ref, off, len, flags, c, d, m, e); #line 14658 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char * c, const char * d, const char * m, const char * e) { if (true) { _nocheck__trace_xen_netdev_tx(dev, ref, off, len, flags, c, d, m, e); } } #define TRACE_XEN_NETDEV_RX_BACKEND_DSTATE() ( \ trace_event_get_state_dynamic_by_id(TRACE_XEN_NETDEV_RX) || \ false) static inline void _nocheck__trace_xen_netdev_rx(int dev, int idx, int status, int flags) { if (trace_event_get_state(TRACE_XEN_NETDEV_RX) && qemu_loglevel_mask(LOG_TRACE)) { if (message_with_timestamp) { struct timeval _now; gettimeofday(&_now, NULL); #line 513 "../hw/net/trace-events" qemu_log("%d@%zu.%06zu:xen_netdev_rx " "vif%u idx %d status %d flags 0x%x" "\n", qemu_get_thread_id(), (size_t)_now.tv_sec, (size_t)_now.tv_usec , dev, idx, status, flags); #line 14685 "trace/trace-hw_net.h" } else { #line 513 "../hw/net/trace-events" qemu_log("xen_netdev_rx " "vif%u idx %d status %d flags 0x%x" "\n", dev, idx, status, flags); #line 14689 "trace/trace-hw_net.h" } } } static inline void trace_xen_netdev_rx(int dev, int idx, int status, int flags) { if (true) { _nocheck__trace_xen_netdev_rx(dev, idx, status, flags); } } #endif /* TRACE_HW_NET_GENERATED_TRACERS_H */