1. Synchronous Protocol Automata for Modelling and Verification of SoC Communication Architectures, to appear in IEE Proc. Computers & Digital Techniques, 2004. (V.J. D'Silva and A. Sowmya)
  2. Slicing Tools for Synchronous Reactive Programs, Proc. of ACM SIGSOFT Int. Symposium on Software Testing and Analysis, ISSTA 2004, ACM Press, 2004 (with A. Kulkarni and V. Kamat)
  3. A Toolset for Modeling and Verification of GALS Systems, Proc. of Computer Aided Verification, CAV 2004, LNCS, June 2004 (with S. Sonalkar, V. D'silva, N. Chandra and B. Vijayalakshmi)
  4. CESC: A Visual Formalism for Specification and Verification of SoCs, Proc. of the ACM Symposium GLSVLSI 2004, April 2004. (with A. Gadkari and R. Parekhji).
  5. Tabled logic programming-based Ip matching tool using forced simulation, to appear in IEE Proceedings Computers & Digital Techniques, 2004 (with P.S. Roop, A. Sowmya)
  6. Test Derivation for Distributed Component-based Systems, Accepted for presentation at the ACM Symposium on Applied Computing, SAC'04, March 2004. (with P.Kerhalkar and A. Srinivas).
  7. Synchronous Protocol Automata for Modelling and Verification of System-on-Chip Bus Architectures, Proc. of IEEE/ACM International Conference on DATE, IEEE Press, February 2004. (with V.J. D'Silva and A. Sowmya).
  8. Bridge over Troubled Wrappers: Automatic Interface Synthesis, Proc. of IEEE International Conference on VLSI Design, IEEE Press, 2004. (with V.J. D'Silva and A. Sowmya).
  9. Static Slicing of Reactive Programs, Proc. of IEEE International Conference on Source Code Analysis and Manipulation SCAM 2003, IEEE Press, 2003. (with A.R. Kulkarni)
  10. Visual Modeling and Verification of Distributed Reactive Systems, Proc. of SAFECOMP 2003, Springer, Septemeber 2003. (with A. Iqbal, S.D. Dhodapkar, A. Battacharjee)
  11. Assertion Checking Environment(ACE) for Formal Verification of C Programs, To appear in Journal on Reliability Engineering and System safety, Vol. 81 (3), 2003. (with B. Sharma and S.D. Dhodapkar)
  12. Pointer Analysis of Multithreaded Java Programs, Proc. of ACM symp. on Applied Computing - SAC'03, ACM Press, March 2003. (with M.G. Nanda)
  13. k-time Forced Simulation: A Formal Verification Technique for IP Reuse, Proc. of ICCD, IEEE Press, Sept. 2002. (with Partha S. Roop and A. Sowmya).
  14. Assertion Checking Environment(ACE) for Formal Verification of C Programs, Proc. of SAFECOMP 2002, LNCS Vol. 2434, Springer, September 2002. (with Babita Sharma and S.D. Dhodapkar)
  15. Slicing Synchronous Reactive Programs, Proc. of the Workshop on Synchronous Languages and Programming, SLAP'02, April 2002. (with G. Vinod)
  16. Forced Simulation: A Technique for Automating Component Reuse in Embedded Systems, ACM Trans. on Design Automation of Electronic Systems, Vol.6 No. 4, October 2001. (with Parth S. Roop and A. Sowmya)
  17. Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object Oriented Programs, IEEE Trans. on Software Engineering, Vol. 27, No. 11, 2001. (with Sridhar Iyer)
  18. A Formal Approach to Component Based Development of Synchronous Programs, Proc. of ASP-DAC 2001, IEEE Press, February 2001. (with P.S. Roop and A. Sowmya)
  19. Refinement and Efficient Verification of Synchronous Programs, IFAC Workshop on Distributed Computer Control Systems, Pergamon Press, December 2000.
  20. Slicing Concurrent Programs, Proc. ACM SIGSOFT International Conference on Software Testing and Analysis (ISSTA 2000), ACM Press, August 2000 (with M. Gowri Nanda)
  21. Languages for Asynchronoy and Synchrony, Int. Journal of Foundations of Computer Science, June 2000 (with R.K. Shyamasundar)
  22. Automated component adaptation by forced simulation, Proc 5th Australasian Computer Architecture Conference, ACAC 2000, Canberra, Feb 2000, ed. G. Heiser, Australian Computer Science Communications, Vol 22, No 4, p. 74-81, IEEE Computer Sci Society, Los Alamitos, Cal. (with P. Roop and A. Sowmya)
  23. Automatic Component Matching using Forced Simulation, Proc. of 13th Int. Conf. on VLSI Design, IEEE Press, January 2000. (with P. Roop and A. Sowmya)
  24. Implementation of Communicating Reactive Processes, Parallel Computing, Vol. 25, No. 6, 1999.
  25. Validation of Pipelined Processor Designs using Esterel Tools: A Case Study, Proc. of CAV '99, LNCS Vol. 1633, 1999. (with P. Bhaduri)
  26. Efficient Translation of Statecharts into Hardware Circuits, Proc. of 12th Int. Conf. on VLSI Design, IEEE Press, January 1999.
  27. Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object-oriented Programs, Proc. of 5th Int. Conf. on High Performance Computing, IEEE Press, December 1998. (with Sridhar Iyer)
  28. Communicating Reactive State Machines: Design, Model and Implementation, IFAC Workshop on Distributed Computer Control Systems, Pergamon Press, September 1998.
  29. Formal specification and verification of hardware designs, Proc. of SPIE, Vol. 3412, Photomask and X-Ray Mask Technology V, Kawasaki, Japan, 1998. (with S. S. S. P. Rao, G. Sivakumar and P. Bhaduri)
  30. Extending Statecharts with Temporal Logic, IEEE Transaction on Software Engineering, Vol. 24, No. 3, March 1998. (with A. Sowmya)
  31. A Tool-Suite for Reachability Analysis of Concurrent Object-Oriented Programs, Proc. of Joint APSEC '97 and ICSC'97, IEEE Press, December 1997. (with Sridhar Iyer)
  32. Impossibility of synchronization in the presence of preemption, Vol. 8, No. 1, Journal of Parallel Processing Letters, 1998. (with C.M. Shetty)
  33. Concurrent Logic Programming and pi calculus, Fourteenth International Conference on Logic Programming, ICLP '97 (poster presentation), July 1997. (with S. Mahajan)
  34. Validation and Analysis of the future bus arbitration protocol: A case study, SADHANA, Academy Proceedings in Engineering Sciences, Indian Academy of Sciences, Vol. 21, Part 2, April 1996. (with F. Boussinot, R.K. Shyamasundar and R. de Simone)
  35. A direct Characterization of Completion, Journal of Theoretical Computer Scince A, Vol. 154, February 1996. (with Srinivas B.N.)
  36. A semantics-preserving transformation of statecharts to FNLOG, 20th IFAC/IFIP Intl Workshop on Real-time Programming, Fort Lauderdale, Florida, USA, Nov 6-10 1995. (with A. Sowmya)
  37. Control design for Autolab using the reactive paradigm, 13th IFAC Intl Workshop on Distributed Computer Control Systems, Toulouse-Blagnac, France, Sept 27-29, Elsevier Science Ltd. 1995. (with S. Bajaj, A. Sowmya, and N. Ahmed)
  38. Verification of CRP programs, Proc.of Conference on Hybrid Systems and Autonomous Control, LNCS, Springer 1994. (with Shyamasundar, R.K.)
  39. Languages for Asynchrony and Synchrony, Proc. of Fault-Tolerant and Real-time Symposioum, LNCS, Springer, 1994. (with Shyamasundar, R.K.)
  40. Communicating Reactive Processes, Proc. of 20th Annual ACM SIGPLAN-SIGACT Symposium on POPL, January, 1993 (with Berry,G., and Shyamasundar, R.K.)