Ministry of Information Technology, Govt. of India
Special Manpower Development in the area of VLSI and related Software
83 lakhs
What follows is a brief description of "Special Manpower Development
Project" and VLSI design Centre. For details please visit
VLSI Design Centre homepage.
VLSI project was started in the year 1987 when National Microelectronics
Council, Department of Electronics (DoE), Government of India considered the
proposal submitted by me in mid 80's in our favour. The project shot off
with DoE funding IIT-Bombay with a grant sum of 75 lakhs towards
establishing a "VLSI Design Centre" with the objective of aiding
VLSI design activities at all levels. The project was also launched
in IIT-Madras, IIT-Kharagpur and IIT-Delhi with the same funding and
VLSI Design Centres were established in these institutions as well.
Situated on the first floor of Computer Centre, the VLSI Design Centre
at IIT-Bombay is associated with and looked after by Computer Science
and Electrical Engineering Departments. While the activities of the centre
are being co-ordinated by me since the establishment of the centre,
various interdepartment faculties are actively involved in its activities
from time to time.
The project was initially funded for 5 years (87 - 92) which was
later extended to another year with myself being the chief investigator
and Prof. S.Biswas, Prof. N.Chandorkar, Prof. K.V.V.Murthy, Prof. H.
Narayan, Prof. J. Vasi and Prof. S.D.Sherlekar being the co-investigators.
The activities of the centre in its infant stage can be broadly
catagorized into CAD tool development and Design of application
specific integerated ciruits.
Simulator for IDEAL
Bombay Relaxation based MOS Integerated Circuit Simulator
Bombay IIT Circuit Simulator
Modified Model Analysis based Circuit Simulator
Principle Lattice of Partitioning
Global and Channnel Routers
PCB Router
Self Checking FSM Synthesis package
are a few to mention towards CAD Tool Development while the ASIC
development includes designing of
Nano Computer
Pulse Code Modulation system Interface Chip
Programmable Dot Matrix Printer ASIC
Fonepost Chips
LSTTL chips
Cathode Ray Tube Controller (CRTC)
Partially overlapped with the activities of the centre was the
design of Digital TV receiver funded by DoE, Government of India
under my co-ordination with Prof.R.K.Shevgaonkar and Prof.P.G.Poonacha
as co-investigators. The project was initiated in the year 1990
and funded for a period 3 years. The achievements made under this
project are
Xilinx 4010 FPGA based 6845 CRTC has been successfully realised
and a plug-in PCB was designed for testing purposes. Working of
this design and implementation was demonstrated on 29th Oct. 1993.
Xilinx FPGA 4010 based Median Filter was designed successfully and
integrated and tested with the rest of the system at ER&DC.
A prototype for PIP containing a Picture-In-Picture processor and
a three line intermediate memory was developed using Field Programmable
Gate Arrays. The prototype was thoroughly tested and was handed over to
IIT Madras for further integration.
Xilinx FPGA 4010 based multi-purpose microcontroller compatible with
8085 was designed and tested
When the project completion report was submitted at the end of the
sixth year (in '93), DoE being pleased with the activities of the centre
decided to extend the project for another three years, but this time
the project was tuned with the objective to bloster the industry
academia interaction. Various industries were actively involved in
the project - Godrej & Boyce (Mumbai), Semi conductor Complex
Ltd. (Chandigarh), Indian Telephone Industries (Bangalore), Apara Design
Automation (Bangalore), Tata Unisys (Mumbai), Tata consultancy
Services (Mumbai), Silicon Automation Systems (Bangalore) are to mention
a few. The activities of the centre continued under my co-ordination
along with Prof.H.Narayan, Prof.S.Biswas and Prof.K.V.V.Murthy as
co-investigators to reach its height with the development of
following CAD tools and chips
Design and Implementation of a Netlist Partitioner
Implementation of a 8-bit Microprocessor using FPGA
PowerPC 403GA Evaluation kit
FPGA Implementation of 68HC11 Microcontroller
FPGA Test Board
FPGA Demo Board
FPGA Implementation of Communication Interface (8251)
Design of a Radiography Timer for Heliophos-D
Implementation of MOSFET Models in Bitsim.
Model Order Reduction Techniques
Design of a 4-bit Microcontroller
Low Power VLSI Design
Development of a Yield Predictor
Fabrication of a Test Chip for Antifuse Process
Design of a Lock-in Amplifier using FPGA and DSP Processor
Implementation of BSIM3 into the cirucit simulator BITSIM.
FPGA Implementation of a Memory Management Unit
Dual 486 CPU Board
At the end of the fourth year of the second phase (in `97) which includes
one year extension of the second phase, a proposal was submitted to
DoE with the motivation to either extend the current project or to
initiate a new one in the centre. During this period, DoE was involved
in estimating the manpower requirement of the indian industry in
the emerging field of VLSI. The committe involved in the estimation
concluded that the Indian VLSI industry would need a minimum of 660
well trained professionals per year. Thus the DoE decided to initiate
a new mode of project with the aim of developing manpower in the
area of vlsi design and related software at the B.Tech, M.Tech and Ph.D
levels so as to put India on the global VLSI Design map. The project
commenced in the year 1998 for a period of five years with DoE being
the project management unit with far reaching responsibilities with
regard to funding, procurement and reporting. All IITs, IISc and
CEERI-Pilani will act as the Resource Centres (RCs) who are responsible
for upgrading and updating the competence of inservice professionals
and students of the participating institutions (PIs). This involves
developing lecture materials on the VLSI related topics, Conduction of
CEPs (Continuing Education Programmes) and IEPs (Instruction Enhancement
Programmes). RCs are also expected to assist the PIs in Industry
Interaction so that the students work on Industry related projects.
The PIs who get trained by the RCs are in turn expected to offer
VLSI related elective courses in their respective institutions at the
B.E/B.Tech levels in the first year of the project, M.E/M.Tech Level
electives in the second and third year and M.E/M.Tech/Ph.D level VLSI
programmes in the 4th and fifth year. Thus this project is expected
to generate the required manpower in the growing field of VLSI
design in the country and to meet the requirements of the Indian
VLSI industries.
Under this Special Manpower Development in VLSI Design and related
Software Project, all the resource centres including the Resource
Centre, IIT-Bombay and the 12 Participating Institutions received
high end servers and work stations for computing purposes, VLSI related
softwares, books and other materials like printers, UPS, xerox m/c,
networking components etc. The VLSI Centre at IIT-Bombay is well equipped
with its 3 sunservers (UltraSparc 10) and approximately 10 workstations
(PIIs) installed with the following tools.
Synopsis Tool suite (Full suite)
Tanner Tools Pro (Full suite)
Cadence Tool Suite (Full suite)
Saber Synthesis Tools (Full suite)
Ambit Synthesis Tools
Compass Layout Design Tools
Xilinx Foundation Series
Xilinx Alliance Tools
Viewlogic's WVOffice 7.53 Frontend tools
Cypress Warp Tools
ModelSim Plus
Apart from the software, the lab is also equipped with the programmming
hardware such as Parallel Download cable and Xchecker cables and with
the modern demoboards such as XS45, XC95 and UW-FPGAs. With the
upgradation of the VLSI lab to include advanced sysnthesis tools
and high end severs and workstations, the centre is all set to reach
out for the industry sponsored student and consultancy projects.