Uday Khedker

Asst. Professor, Department of Computer Science & Engg., IIT Bombay

Student Projects   Current   Past

Current Projects

1. Applications of Static Analysis to Heap Memory Management (with Prof. A. Sanyal)

   This is a continuation of the garbage collection project.

   M.Tech. Student
   C Arunkumar

   
   
   

2. Retargetting GCC to Cradle's UMS chip (with Prof. A. Sanyal)

   A GCC port exists for the Processing Engine of Cradle's 3SoC (Software Scalable System on Chip, aka UMS) but not for the Digital Signal Engine. The primary objective of this project is producing a GCC port for the Digital Signal Engine. A secondary objective of this project is to study GCC's RTL and explore the possibilities of improving GCC's code generation algorithms.

   M.Tech. Student
   Nitin Jain

   
   
   

Past Projects

1. Some Improvements in Gargbage Collection (with Prof. A. Sanyal)

   • Background. Garbage collection is the automatic reclamation of storage allocated to dynamically created data objects in a program during execution. The reclaimed space can then be re-allocated to the program for further use. Use of a garbage collector frees the programmer from management of memory. Most garbage collectors use one of the following approaches : Reference Counting, Mark and Sweep, and Copying Collection.
     
     
   • Objectives. The proposed project aims at some investigations in improving the existing mark and sweep and copying collection approaches to garbage collection, by devising better program analyses. We envisage improvements in the following two broad directions :
     
     
     1. Detecting More Garbage. Current copying collection leaves a lot of garbage uncollected primarily because they perform little or no static analysis. We propose to employ static analysis to detect more garbage.
        
        
     2. Making the Garbage Collection Process More Efficient. We believe that efficiency can be improved on the following two counts~:
        
        
        1. Efficiency of the static analysis required for identifying garbage at select GC points.
        2. Efficiency of the dynamic process of actual garbage collection.
           
           
     We expect the implementations to focus on garbage collection for Java.
     
     A survey paper on garbage collection can be downloaded.
     
     
   • Students .

     M.Tech. Student
     Sarika Joshi

     
     
     

2. Incremental Data Flow Analysis in VxCC (Sponsored by Tata Infotech Ltd.)

   • About VxCC. VxCC is an agressively optimizing cross compiler for VxC which is a variant of C designed specially for developing signal processing application on a DSP chip. I am the principal architect of this compiler; it has been implemented by Tata Infotech Ltd. Currenly it is undergoing testing and we expect to close on all issues by the first week of Novermber 2001.
     
     Work on the compiler for the next chip of VxTel and possible enhancements to this compiler is likely to begin by January 2002.
     
     
   • About The Architecture. The instruction set architecture of this chips is quite advanced with Asymmetric vector and scalar units, generalisation of MAC operation concept, predicated instructions, restricted VLIW architecture with short as well as long instructions, manipulation of data during memory reads and writes, parallel loads and stores, local customisation of execution semantics etc.
     
     
   • About the Compiler. DSP architectures are driven by the need of raw performance with little or no regard to compilers. The task of designing a compiler for a DSP processor, which becomes difficult due to irregular architecture, becomes even more difficult due to the stiff demands on efficiency of generated code. We believe that while the proof-of-concept compilers can be generated for such processors by specifying the architectures, good optimizing compilers for such architectures can only be crafted and not generated or assembled. We have followed this philosophy and have been able to exploit novel optimization opportunities by the combined effect of extending the language, custom designing an intermediate format, modifying the state or art data flow analyses, devising new advanced data flow analyses and more intelligent register allocation. However, good code generation remains a hard problem since the irregularity of instructions does not enable clean analyses.
     
     
   • Objectives of the proposed project. The compiler performs many advanced analyses using simple round robin method of data flow analysis. One application of optimization often leads to creation of (or ``uncovering'' of) new optimization opportunities. The existing compiler does not perform optimizations again since it would be costly in terms of time. The goal of this project is to enable re-analysis for incremental updates of data flow information so as to make subsequent applications of optimizations cost-effective.
     
     This is an exploratory project which investigates the possibility and cost-effectiveness of generic incremental data flow analysis algorithms for a bidirectional data flow problems.
     
     
   • Students .

     M.Tech. Student
     Abhay Marode

     
     
     
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Last updated on 22 July 2003.