CS226: Digital Logic Design (Spring 2014)

Logistics

Relevant Textbooks

Main Reference Lab Reference

Grading

  • End-Semester Exams: 50%
  • Mid-Semester Exams: 30%
  • Quizzes: 10%
  • Class participation: 10%

Topics

  1. Digital Systems and Binary Numbers
  2. Boolean Algebra and Logic Gates
  3. Gate-level Minimization
  4. Combinational Logic
    [Mid-semester Exams]
  5. Synchronous Sequential Logic
  6. Registers and Counters
  7. Memory and Programmable Logic
  8. Design at the RTL Level
  9. Special Topics

Schedule and Lecture Notes

# Date Description Textbook References
1 Jan 13 Introduction to Digital Logic Design [Slides ]
2 Jan 16 Digital Systems and Binary Numbers [Slides ] Morris Mano and Clietti: Chapter 1
3 Jan 20 Binary Arithmetic (Contd.) [Slides ] Morrid Mano and Clietti: Chapter 1
4 Jan 23 Introduction to Logic Circuits [Slides ] Morris Mano and Clietti: Chapter 2, Brown and Vranesic: Chapter 2
5 Jan 27 Optimized Implementation of Logic Functions [Slides ] Morris Mano and Clietti: Chapter 3, Brown and Vranesic: Chapter 4
6 Jan 30 Arithmetic Circuits (Binary Adder, Binary Subtractors, Multipliers, and Comparators) [Slides on Piazza] Brown and Vranesic: Chapter 5, Morris Mano and Clietti: Chapter 4
7 Feb 3 Combinational-Circuit Building Blocks (Decoders, Encoders, Multiplexers) [Slides on Piazza] Morris Mano and Clietti: Chapter 4, Brown and Vranesic: Chapter 6
8 Feb 6 Combinational-Circuit Building Blocks (Contd.) [Slides on Piazza] Morris Mano and Clietti: Chapter 4, Brown and Vranesic: Chapter 6
9 Feb 10 Tutorial
10 Feb 13 Quiz I
11 Feb 17 Solution of Quiz 1 and Practice questions on Karnaugh maps
12 Feb 20—Feb27 Midsem Week
15 March 3 Synchronous Sequential Logic (Introduction, Latches) [Slides ] Morris Mano and Clietti: Chapter 5, Brown and Vranesic: Chapter 7
16 Mar 6 Institute Holiday
17 Mar 10 Class Rescheduled to Mar 21.
18 Mar 13 Synchronous Sequential Logic (Flip-flops) [Slides ] Morris Mano and Clietti: Chapter 5, Brown and Vranesic: Chapter 7
19 Mar 17 Synchronous Sequential Logic (State Diagram and Analysis) [Slides ] Morris Mano and Clietti: Chapter 5, Brown and Vranesic: Chapter 7
20 Mar 20 Synchronous Sequential Logic (Synthesis) [Slides ] Morris Mano and Clietti: Chapter 5, Brown and Vranesic: Chapter 7
21 Mar 21 Quiz II (Clocked Sequential Circuits)

Notes